[PATCH] D129322: [AMDGPU][Scheduler] Avoid initializing Register pressure tracker when tracking is disabled
Anshil Gandhi via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 28 14:40:18 PDT 2022
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG5c380564317c: [AMDGPU][Scheduler] Avoid initializing Register pressure tracker when tracking… (authored by gandhi21299).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D129322/new/
https://reviews.llvm.org/D129322
Files:
llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
llvm/test/CodeGen/AMDGPU/schedule-regpressure.mir
Index: llvm/test/CodeGen/AMDGPU/schedule-regpressure.mir
===================================================================
--- llvm/test/CodeGen/AMDGPU/schedule-regpressure.mir
+++ llvm/test/CodeGen/AMDGPU/schedule-regpressure.mir
@@ -1,4 +1,6 @@
# RUN: llc -march=amdgcn -misched=converge -run-pass machine-scheduler %s -o - -debug-only=machine-scheduler 2>&1 | FileCheck %s
+# RUN: llc -march=amdgcn -misched-regpressure=false -run-pass machine-scheduler %s -o - -debug-only=machine-scheduler 2>&1 | FileCheck %s --check-prefix=NORP
+
# REQUIRES: asserts
# Check there is no SReg_32 pressure created by DS_* instructions because of M0 use
@@ -8,6 +10,19 @@
# CHECK: Pressure Diff : {{$}}
# CHECK: SU({{.*}} DS_WRITE_B32
+# NORP: ScheduleDAGMILive::schedule starting
+# NORP: GenericScheduler RegionPolicy: ShouldTrackPressure=0
+# NORP-NOT: Pressure Diff : {{$}}
+# NORP-NOT: Pressure Diff : {{$}}
+# NORP-NOT: Pressure Diff : {{$}}
+# NORP-NOT: Pressure Diff : {{$}}
+# NORP-NOT: Pressure Diff : {{$}}
+# NORP-NOT: Pressure Diff : {{$}}
+# NORP-NOT: Bottom Pressure:
+# NORP-NOT: UpdateRegP
+# NORP-NOT: UpdateRegP
+# NORP-NOT: UpdateRegP
+
---
name: mo_pset
alignment: 1
Index: llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
+++ llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
@@ -79,10 +79,12 @@
const SIRegisterInfo *SRI,
unsigned SGPRPressure,
unsigned VGPRPressure) {
-
Cand.SU = SU;
Cand.AtTop = AtTop;
+ if (!DAG->isTrackingPressure())
+ return;
+
// getDownwardPressure() and getUpwardPressure() make temporary changes to
// the tracker, so we need to pass those function a non-const copy.
RegPressureTracker &TempTracker = const_cast<RegPressureTracker&>(RPTracker);
@@ -165,8 +167,12 @@
SchedCandidate &Cand) {
const SIRegisterInfo *SRI = static_cast<const SIRegisterInfo*>(TRI);
ArrayRef<unsigned> Pressure = RPTracker.getRegSetPressureAtPos();
- unsigned SGPRPressure = Pressure[AMDGPU::RegisterPressureSets::SReg_32];
- unsigned VGPRPressure = Pressure[AMDGPU::RegisterPressureSets::VGPR_32];
+ unsigned SGPRPressure = 0;
+ unsigned VGPRPressure = 0;
+ if (DAG->isTrackingPressure()) {
+ SGPRPressure = Pressure[AMDGPU::RegisterPressureSets::SReg_32];
+ VGPRPressure = Pressure[AMDGPU::RegisterPressureSets::VGPR_32];
+ }
ReadyQueue &Q = Zone.Available;
for (SUnit *SU : Q) {
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