[PATCH] D130699: [AArch64][DAGCombine] Add pushAndThroughExtractSubvector

Paul Walker via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jul 28 07:48:14 PDT 2022


paulwalker-arm added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:15012-15017
+  BuildVectorSDNode *BVN = dyn_cast<BuildVectorSDNode>(RHS);
+  if (!BVN)
+    return SDValue();
+  ConstantSDNode *BVNConstant = BVN->getConstantSplatNode();
+  if (!BVNConstant)
+    return SDValue();
----------------
Do you need to care about the exact node here.  Can you use `isConstOrConstSplat` instead?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D130699/new/

https://reviews.llvm.org/D130699



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