[PATCH] D130698: [AArch64][DAGCombine] Add performBuildVectorCombine 'extract_elt ~> anyext'
Peter Waller via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 28 04:15:52 PDT 2022
peterwaller-arm created this revision.
peterwaller-arm added reviewers: c-rhodes, DavidTruby, dtemirbulatov, paulwalker-arm.
Herald added subscribers: hiraditya, kristof.beyls.
Herald added a project: All.
peterwaller-arm published this revision for review.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.
A build vector of two extracted elements is equivalent to an extract
subvector where the inner vector is any-extended to the
extract_vector_elt VT, because extract_vector_elt has the effect of an
any-extend.
(build_vector (extract_elt_i16_to_i32 vec Idx+0) (extract_elt_i16_to_i32 vec Idx+1))
=> (extract_subvector (anyext_i16_to_i32 vec) Idx)
Depends on D130697 <https://reviews.llvm.org/D130697>
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D130698
Files:
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/test/CodeGen/AArch64/bitcast-promote-widen.ll
llvm/test/CodeGen/AArch64/sve-fixed-length-extract-subvector.ll
llvm/test/CodeGen/AArch64/sve-fixed-length-masked-gather.ll
llvm/test/CodeGen/AArch64/sve-fixed-length-masked-loads.ll
llvm/test/CodeGen/AArch64/sve-fixed-length-masked-scatter.ll
llvm/test/CodeGen/AArch64/sve-fixed-length-masked-stores.ll
llvm/test/CodeGen/AArch64/vector-fcvt.ll
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