[PATCH] D130638: [X86][MC] Avoid emitting incorrect warning for complex FMUL
Kan Shengchen via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 27 20:03:58 PDT 2022
skan added inline comments.
================
Comment at: llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp:3853
+ // VFMULCPHZrrk Dest, Dest, Mask, Src1, Src2
+ if ((TSFlags & (X86II::EVEX_K | X86II::EVEX_Z)) == X86II::EVEX_K)
+ ++i;
----------------
pengfei wrote:
> LuoYuanke wrote:
> > Just be curious. Since there is not issue for VFCMADDCPH, why for VFCMULCPH the mask version does not conform with non-mask version?
> The reason is in the differences of the input dag (generated by `-print-records`):
> ```
> def VFCMADDCPHZr {
> ... ...
> dag OutOperandList = (outs VR512:$dst);
> dag InOperandList = (ins VR512:$src1, VR512:$src2, VR512:$src3);
> ... ...
> string Constraints = "@earlyclobber $dst, $src1 = $dst";
> ... ...
> }
> def VFMULCPHZrr {
> ... ...
> dag OutOperandList = (outs VR512:$dst);
> dag InOperandList = (ins VR512:$src1, VR512:$src2);
> ... ...
> string Constraints = "@earlyclobber $dst";
> ... ...
> }
> def VFMULCPHZrrk {
> ... ...
> dag OutOperandList = (outs VR512:$dst);
> dag InOperandList = (ins VR512:$src0, VK16WM:$mask, VR512:$src1, VR512:$src2);
> ... ...
> string Constraints = "@earlyclobber $dst, $src0 = $dst";
> ... ...
> }
> ```
Do we need `X86II:EVEX_Z` here?
================
Comment at: llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp:3854
+ if ((TSFlags & (X86II::EVEX_K | X86II::EVEX_Z)) == X86II::EVEX_K)
+ ++i;
+ for (; i < Inst.getNumOperands(); i++)
----------------
Using condtional operator here could be more clear
`unsigned i = (TSFlags & X86II::EVEX_Z) ? 2: 1;`
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D130638/new/
https://reviews.llvm.org/D130638
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