[llvm] e8ceadd - [LV][RISCV] Add a test case for a quality problem mixing vector index and data types
Philip Reames via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 27 11:42:34 PDT 2022
Author: Philip Reames
Date: 2022-07-27T11:42:28-07:00
New Revision: e8ceadd0ce465f7223eea7dc923ce8a25f68b4ba
URL: https://github.com/llvm/llvm-project/commit/e8ceadd0ce465f7223eea7dc923ce8a25f68b4ba
DIFF: https://github.com/llvm/llvm-project/commit/e8ceadd0ce465f7223eea7dc923ce8a25f68b4ba.diff
LOG: [LV][RISCV] Add a test case for a quality problem mixing vector index and data types
The problem here is target independent, but particularly painful on RISCV. If we chose to vectorize such that vscale x 2 x i32 is our widest type and fits in a register, a naive expansion of i64 comparisons results in comparisons and index types at <scalabe x 2 x i64>. This requires both an LMUL of 2, and a VSETVLI toggle in the loop. Note that we could have used <vscale x 2 x i32> for the compairons legally given the range of the trip count.
Added:
llvm/test/Transforms/LoopVectorize/RISCV/mask-index-type.ll
Modified:
Removed:
################################################################################
diff --git a/llvm/test/Transforms/LoopVectorize/RISCV/mask-index-type.ll b/llvm/test/Transforms/LoopVectorize/RISCV/mask-index-type.ll
new file mode 100644
index 0000000000000..ba94d13aa4d8e
--- /dev/null
+++ b/llvm/test/Transforms/LoopVectorize/RISCV/mask-index-type.ll
@@ -0,0 +1,127 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -loop-vectorize -scalable-vectorization=on -mtriple riscv64-linux-gnu -mattr=+v,+f -S 2>%t | FileCheck %s -check-prefix=VLENUNK
+
+target datalayout = "e-m:e-p:64:64-i64:64-i128:128-n64-S128"
+target triple = "riscv64"
+
+; FIXME: In this example, we pick a vector index with which is wider than
+; the data width. This is correct, but sub-optimal as it causes a vsetvli
+; toggle in the generated code for no reason. We could have used a i32
+; element type for the index here and matched the data width.
+define void @test(ptr noalias nocapture %a, ptr noalias nocapture %b, i32 %v) {
+; VLENUNK-LABEL: @test(
+; VLENUNK-NEXT: entry:
+; VLENUNK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64()
+; VLENUNK-NEXT: [[TMP1:%.*]] = mul i64 [[TMP0]], 4
+; VLENUNK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 1024, [[TMP1]]
+; VLENUNK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
+; VLENUNK: vector.ph:
+; VLENUNK-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64()
+; VLENUNK-NEXT: [[TMP3:%.*]] = mul i64 [[TMP2]], 4
+; VLENUNK-NEXT: [[N_MOD_VF:%.*]] = urem i64 1024, [[TMP3]]
+; VLENUNK-NEXT: [[N_VEC:%.*]] = sub i64 1024, [[N_MOD_VF]]
+; VLENUNK-NEXT: [[TMP4:%.*]] = call <vscale x 2 x i64> @llvm.experimental.stepvector.nxv2i64()
+; VLENUNK-NEXT: [[TMP5:%.*]] = add <vscale x 2 x i64> [[TMP4]], zeroinitializer
+; VLENUNK-NEXT: [[TMP6:%.*]] = mul <vscale x 2 x i64> [[TMP5]], shufflevector (<vscale x 2 x i64> insertelement (<vscale x 2 x i64> poison, i64 1, i32 0), <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer)
+; VLENUNK-NEXT: [[INDUCTION:%.*]] = add <vscale x 2 x i64> zeroinitializer, [[TMP6]]
+; VLENUNK-NEXT: [[TMP7:%.*]] = call i64 @llvm.vscale.i64()
+; VLENUNK-NEXT: [[TMP8:%.*]] = mul i64 [[TMP7]], 2
+; VLENUNK-NEXT: [[TMP9:%.*]] = mul i64 1, [[TMP8]]
+; VLENUNK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[TMP9]], i32 0
+; VLENUNK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 2 x i64> [[DOTSPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
+; VLENUNK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <vscale x 2 x i32> poison, i32 [[V:%.*]], i32 0
+; VLENUNK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <vscale x 2 x i32> [[BROADCAST_SPLATINSERT]], <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer
+; VLENUNK-NEXT: [[BROADCAST_SPLATINSERT4:%.*]] = insertelement <vscale x 2 x i32> poison, i32 [[V]], i32 0
+; VLENUNK-NEXT: [[BROADCAST_SPLAT5:%.*]] = shufflevector <vscale x 2 x i32> [[BROADCAST_SPLATINSERT4]], <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer
+; VLENUNK-NEXT: br label [[VECTOR_BODY:%.*]]
+; VLENUNK: vector.body:
+; VLENUNK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
+; VLENUNK-NEXT: [[VEC_IND:%.*]] = phi <vscale x 2 x i64> [ [[INDUCTION]], [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ]
+; VLENUNK-NEXT: [[STEP_ADD:%.*]] = add <vscale x 2 x i64> [[VEC_IND]], [[DOTSPLAT]]
+; VLENUNK-NEXT: [[TMP10:%.*]] = add i64 [[INDEX]], 0
+; VLENUNK-NEXT: [[TMP11:%.*]] = call i64 @llvm.vscale.i64()
+; VLENUNK-NEXT: [[TMP12:%.*]] = mul i64 [[TMP11]], 2
+; VLENUNK-NEXT: [[TMP13:%.*]] = add i64 [[TMP12]], 0
+; VLENUNK-NEXT: [[TMP14:%.*]] = mul i64 [[TMP13]], 1
+; VLENUNK-NEXT: [[TMP15:%.*]] = add i64 [[INDEX]], [[TMP14]]
+; VLENUNK-NEXT: [[TMP16:%.*]] = icmp ult <vscale x 2 x i64> [[VEC_IND]], shufflevector (<vscale x 2 x i64> insertelement (<vscale x 2 x i64> poison, i64 512, i32 0), <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer)
+; VLENUNK-NEXT: [[TMP17:%.*]] = icmp ult <vscale x 2 x i64> [[STEP_ADD]], shufflevector (<vscale x 2 x i64> insertelement (<vscale x 2 x i64> poison, i64 512, i32 0), <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer)
+; VLENUNK-NEXT: [[TMP18:%.*]] = getelementptr i32, ptr [[A:%.*]], i64 [[TMP10]]
+; VLENUNK-NEXT: [[TMP19:%.*]] = getelementptr i32, ptr [[A]], i64 [[TMP15]]
+; VLENUNK-NEXT: [[TMP20:%.*]] = getelementptr i32, ptr [[TMP18]], i32 0
+; VLENUNK-NEXT: [[WIDE_MASKED_LOAD:%.*]] = call <vscale x 2 x i32> @llvm.masked.load.nxv2i32.p0(ptr [[TMP20]], i32 4, <vscale x 2 x i1> [[TMP16]], <vscale x 2 x i32> poison)
+; VLENUNK-NEXT: [[TMP21:%.*]] = call i32 @llvm.vscale.i32()
+; VLENUNK-NEXT: [[TMP22:%.*]] = mul i32 [[TMP21]], 2
+; VLENUNK-NEXT: [[TMP23:%.*]] = getelementptr i32, ptr [[TMP18]], i32 [[TMP22]]
+; VLENUNK-NEXT: [[WIDE_MASKED_LOAD2:%.*]] = call <vscale x 2 x i32> @llvm.masked.load.nxv2i32.p0(ptr [[TMP23]], i32 4, <vscale x 2 x i1> [[TMP17]], <vscale x 2 x i32> poison)
+; VLENUNK-NEXT: [[TMP24:%.*]] = xor <vscale x 2 x i1> [[TMP16]], shufflevector (<vscale x 2 x i1> insertelement (<vscale x 2 x i1> poison, i1 true, i32 0), <vscale x 2 x i1> poison, <vscale x 2 x i32> zeroinitializer)
+; VLENUNK-NEXT: [[TMP25:%.*]] = xor <vscale x 2 x i1> [[TMP17]], shufflevector (<vscale x 2 x i1> insertelement (<vscale x 2 x i1> poison, i1 true, i32 0), <vscale x 2 x i1> poison, <vscale x 2 x i32> zeroinitializer)
+; VLENUNK-NEXT: [[PREDPHI:%.*]] = select <vscale x 2 x i1> [[TMP24]], <vscale x 2 x i32> zeroinitializer, <vscale x 2 x i32> [[WIDE_MASKED_LOAD]]
+; VLENUNK-NEXT: [[PREDPHI3:%.*]] = select <vscale x 2 x i1> [[TMP25]], <vscale x 2 x i32> zeroinitializer, <vscale x 2 x i32> [[WIDE_MASKED_LOAD2]]
+; VLENUNK-NEXT: [[TMP26:%.*]] = add <vscale x 2 x i32> [[PREDPHI]], [[BROADCAST_SPLAT]]
+; VLENUNK-NEXT: [[TMP27:%.*]] = add <vscale x 2 x i32> [[PREDPHI3]], [[BROADCAST_SPLAT5]]
+; VLENUNK-NEXT: [[TMP28:%.*]] = getelementptr inbounds i32, ptr [[B:%.*]], i64 [[TMP10]]
+; VLENUNK-NEXT: [[TMP29:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[TMP15]]
+; VLENUNK-NEXT: [[TMP30:%.*]] = getelementptr inbounds i32, ptr [[TMP28]], i32 0
+; VLENUNK-NEXT: store <vscale x 2 x i32> [[TMP26]], ptr [[TMP30]], align 4
+; VLENUNK-NEXT: [[TMP31:%.*]] = call i32 @llvm.vscale.i32()
+; VLENUNK-NEXT: [[TMP32:%.*]] = mul i32 [[TMP31]], 2
+; VLENUNK-NEXT: [[TMP33:%.*]] = getelementptr inbounds i32, ptr [[TMP28]], i32 [[TMP32]]
+; VLENUNK-NEXT: store <vscale x 2 x i32> [[TMP27]], ptr [[TMP33]], align 4
+; VLENUNK-NEXT: [[TMP34:%.*]] = call i64 @llvm.vscale.i64()
+; VLENUNK-NEXT: [[TMP35:%.*]] = mul i64 [[TMP34]], 4
+; VLENUNK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP35]]
+; VLENUNK-NEXT: [[VEC_IND_NEXT]] = add <vscale x 2 x i64> [[STEP_ADD]], [[DOTSPLAT]]
+; VLENUNK-NEXT: [[TMP36:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
+; VLENUNK-NEXT: br i1 [[TMP36]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
+; VLENUNK: middle.block:
+; VLENUNK-NEXT: [[CMP_N:%.*]] = icmp eq i64 1024, [[N_VEC]]
+; VLENUNK-NEXT: br i1 [[CMP_N]], label [[FOR_END:%.*]], label [[SCALAR_PH]]
+; VLENUNK: scalar.ph:
+; VLENUNK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ]
+; VLENUNK-NEXT: br label [[FOR_BODY:%.*]]
+; VLENUNK: for.body:
+; VLENUNK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LATCH:%.*]] ]
+; VLENUNK-NEXT: [[ICMP:%.*]] = icmp ult i64 [[IV]], 512
+; VLENUNK-NEXT: br i1 [[ICMP]], label [[DO_LOAD:%.*]], label [[LATCH]]
+; VLENUNK: do_load:
+; VLENUNK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[IV]]
+; VLENUNK-NEXT: [[ELEM:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
+; VLENUNK-NEXT: br label [[LATCH]]
+; VLENUNK: latch:
+; VLENUNK-NEXT: [[PHI:%.*]] = phi i32 [ [[ELEM]], [[DO_LOAD]] ], [ 0, [[FOR_BODY]] ]
+; VLENUNK-NEXT: [[ADD:%.*]] = add i32 [[PHI]], [[V]]
+; VLENUNK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[IV]]
+; VLENUNK-NEXT: store i32 [[ADD]], ptr [[ARRAYIDX2]], align 4
+; VLENUNK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
+; VLENUNK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], 1024
+; VLENUNK-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP2:![0-9]+]]
+; VLENUNK: for.end:
+; VLENUNK-NEXT: ret void
+;
+entry:
+ br label %for.body
+
+for.body:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %latch ]
+ %icmp = icmp ult i64 %iv, 512
+ br i1 %icmp, label %do_load, label %latch
+
+do_load:
+ %arrayidx = getelementptr inbounds i32, ptr %a, i64 %iv
+ %elem = load i32, ptr %arrayidx
+ br label %latch
+
+latch:
+ %phi = phi i32 [%elem, %do_load], [0, %for.body]
+ %add = add i32 %phi, %v
+ %arrayidx2 = getelementptr inbounds i32, ptr %b, i64 %iv
+ store i32 %add, ptr %arrayidx2
+ %iv.next = add nuw nsw i64 %iv, 1
+ %exitcond.not = icmp eq i64 %iv.next, 1024
+ br i1 %exitcond.not, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
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