[PATCH] D130637: [LV] Don't predicate uniform mem op stores unneccessarily
Philip Reames via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 27 07:42:17 PDT 2022
reames created this revision.
reames added reviewers: fhahn, david-arm.
Herald added subscribers: bollu, hiraditya, mcrosier.
Herald added a project: All.
reames requested review of this revision.
Herald added a project: LLVM.
We already had the reasoning about uniform mem op loads; if the address is accessed at least once, we know the instruction doesn't need predicated. This change just extends it to handle uniform mem op stores as well.
Warning on confusing terminology: "uniform" vs "uniform mem op" mean two different things here, and this patch is specific to the later. It would *not* be legal to make this same change for merely "uniform" operations.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D130637
Files:
llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
llvm/test/Transforms/LoopVectorize/X86/consecutive-ptr-uniforms.ll
llvm/test/Transforms/LoopVectorize/pr45679-fold-tail-by-masking.ll
llvm/test/Transforms/LoopVectorize/pr46525-expander-insertpoint.ll
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