[PATCH] D130364: [LV] Recognize store of invariant value to invariant address as uniform
Florian Hahn via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 27 07:13:35 PDT 2022
fhahn added inline comments.
================
Comment at: llvm/test/Transforms/LoopVectorize/X86/consecutive-ptr-uniforms.ll:96
; FORCE-NEXT: [[TMP2:%.*]] = icmp ule <2 x i32> [[VEC_IND]], <i32 2, i32 2>
+; FORCE-NEXT: store i32 [[TMP0]], i32* @b, align 1
+; FORCE-NEXT: store i32 [[TMP1]], i32* @b, align 1
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reames wrote:
> david-arm wrote:
> > Hi @reames, something doesn't look right about this change because each store instruction is storing out a different value.
> This is correct, but not directly related to the thrust of the patch. This is a side effect of the change in isScalarWithPredication. We'd previously been considering these stores to be predicated. They are unconditional in the original IR, so this should be correct.
>
> If you want, I can split the patch further to do a pre-change with just the change in isScalarWithPredication.
Yeah it would probably be good to split off the change to ‘ isPredicatedInst’, especially if it reduces the test changes per patch
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D130364/new/
https://reviews.llvm.org/D130364
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