[PATCH] D130621: [RISCV] Add target feature to force 32-bit atomics

Wang Pengcheng via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jul 27 05:15:44 PDT 2022


pcwang-thead added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoA.td:111
+let Predicates = [HasAtomicLdSt32] in {
+  defm : LdPat<atomic_load_8,  LB>;
+  defm : LdPat<atomic_load_16, LH>;
----------------
nikic wrote:
> jrtc27 wrote:
> > Don’t duplicate patterns
> What's the right way to avoid the duplication here? Is there a way to use "or" inside Predicates?
You can define an `or` predicate in RISCV.td like `HasStdExtMOrZmmul`, `HasStdExtZfhOrZfhmin`, etc.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D130621/new/

https://reviews.llvm.org/D130621



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