[PATCH] D129765: [DAG] SimplifyDemandedBits - don't early-out for multiple use values
Mikael Holmén via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 27 04:55:24 PDT 2022
uabelho added a comment.
In D129765#3681963 <https://reviews.llvm.org/D129765#3681963>, @uabelho wrote:
> Hi,
>
> I'm seeing a crash
>
> 13:07:13 llc: ../lib/CodeGen/SelectionDAG/TargetLowering.cpp:1878: bool llvm::TargetLowering::SimplifyDemandedBits(llvm::SDValue, const llvm::APInt &, const llvm::APInt &, llvm::KnownBits &, llvm::TargetLowering::TargetLoweringOpt &, unsigned int, bool) const: Assertion `!Known.hasConflict() && "Bits known to be one AND zero?"' failed.
>
> with this patch. I'll see if I can extract a reproducer.
Ok, like this:
llc -march=x86-64 -mcpu=corei7 -o /dev/null sim.ll
F23924864: sim.ll <https://reviews.llvm.org/F23924864>
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https://reviews.llvm.org/D129765/new/
https://reviews.llvm.org/D129765
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