[PATCH] D130560: [RISCV] Handle register spill in branch relaxation

Piggy via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jul 26 23:23:53 PDT 2022


piggynl updated this revision to Diff 447938.
piggynl added a comment.

Fix code style via clang-format.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D130560/new/

https://reviews.llvm.org/D130560

Files:
  llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
  llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
  llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.h
  llvm/test/CodeGen/RISCV/branch-relaxation-spill-32.ll
  llvm/test/CodeGen/RISCV/branch-relaxation-spill-64.ll
  llvm/test/CodeGen/RISCV/branch-relaxation.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D130560.447938.patch
Type: text/x-patch
Size: 32167 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20220727/0d24c5f3/attachment.bin>


More information about the llvm-commits mailing list