[PATCH] D130560: [RISCV] Handle register spill in branch relaxation

[luxufan via Phabricator via llvm-commits]

StephenFan added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVFrameLowering.cpp:1083
+    // To float or sink the frame index to close to the stack base register.
+    RS->addScavengingFrameIndex(FI);
+  }
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If it would be better to add a test case that has a large stack and the offset of BranchRelaxationScratchFrameIndex is out of range of Int<12>(if it is not floated or sunk)?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D130560/new/

https://reviews.llvm.org/D130560