[PATCH] D130075: [InstCombine] Try not to demand low order bits for Add

[Jay Foad via Phabricator via llvm-commits]

foad updated this revision to Diff 447736.
foad added a comment.

Add a test case.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D130075/new/

https://reviews.llvm.org/D130075

Files:
  llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
  llvm/test/Transforms/InstCombine/add2.ll
  llvm/test/Transforms/LoopVectorize/X86/float-induction-x86.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D130075.447736.patch
Type: text/x-patch
Size: 8824 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20220726/6aa683ba/attachment.bin>