[llvm] 5c396be - [llvm-objdump,ARM] Fix further test failures.
Simon Tatham via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 26 03:35:22 PDT 2022
Author: Simon Tatham
Date: 2022-07-26T11:35:16+01:00
New Revision: 5c396be5750e211866a1880d1ad3918175cf00b7
URL: https://github.com/llvm/llvm-project/commit/5c396be5750e211866a1880d1ad3918175cf00b7
DIFF: https://github.com/llvm/llvm-project/commit/5c396be5750e211866a1880d1ad3918175cf00b7.diff
LOG: [llvm-objdump,ARM] Fix further test failures.
Further test-failure fallout from D130358. There were a handful of
uses of llvm-objdump in the CodeGen tests as well, which have taken me
longer to get to because more things had to be built.
Added:
Modified:
llvm/test/CodeGen/AArch64/aarch64-p2align-max-bytes.ll
llvm/test/CodeGen/AArch64/inlineasm-ldr-pseudo.ll
llvm/test/CodeGen/AArch64/simple-macho.ll
llvm/test/CodeGen/ARM/inlineasm-ldr-pseudo.ll
llvm/test/CodeGen/ARM/inlineasm-switch-mode-oneway-from-arm.ll
llvm/test/CodeGen/ARM/inlineasm-switch-mode-oneway-from-thumb.ll
llvm/test/CodeGen/ARM/inlineasm-switch-mode.ll
llvm/test/CodeGen/ARM/trap.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/AArch64/aarch64-p2align-max-bytes.ll b/llvm/test/CodeGen/AArch64/aarch64-p2align-max-bytes.ll
index 58c638e70e9e4..7601afc961ec1 100644
--- a/llvm/test/CodeGen/AArch64/aarch64-p2align-max-bytes.ll
+++ b/llvm/test/CodeGen/AArch64/aarch64-p2align-max-bytes.ll
@@ -16,14 +16,14 @@ define i32 @a(i32 %x, i32* nocapture readonly %y, i32* nocapture readonly %z) {
; CHECK-IMPLICIT: .p2align 5
; CHECK-NEXT: .LBB0_8: // %for.body
; CHECK-OBJ;Disassembly of section .text:
-; CHECK-OBJ: 88: 2a 00 0a 8b add
-; CHECK-OBJ-IMPLICIT-NEXT: 8c: 1f 20 03 d5 nop
-; CHECK-OBJ-IMPLICIT-NEXT: 90: 1f 20 03 d5 nop
-; CHECK-OBJ-IMPLICIT-NEXT: 94: 1f 20 03 d5 nop
-; CHECK-OBJ-IMPLICIT-NEXT: 98: 1f 20 03 d5 nop
-; CHECK-OBJ-IMPLICIT-NEXT: 9c: 1f 20 03 d5 nop
-; CHECK-OBJ-IMPLICIT-NEXT: a0: 4b 45 40 b8 ldr
-; CHECK-OBJ-EXPLICIT-NEXT: 8c: 4b 45 40 b8 ldr
+; CHECK-OBJ: 88: 8b0a002a add
+; CHECK-OBJ-IMPLICIT-NEXT: 8c: d503201f nop
+; CHECK-OBJ-IMPLICIT-NEXT: 90: d503201f nop
+; CHECK-OBJ-IMPLICIT-NEXT: 94: d503201f nop
+; CHECK-OBJ-IMPLICIT-NEXT: 98: d503201f nop
+; CHECK-OBJ-IMPLICIT-NEXT: 9c: d503201f nop
+; CHECK-OBJ-IMPLICIT-NEXT: a0: b840454b ldr
+; CHECK-OBJ-EXPLICIT-NEXT: 8c: b840454b ldr
entry:
%cmp10 = icmp sgt i32 %x, 0
br i1 %cmp10, label %for.body.preheader, label %for.cond.cleanup
diff --git a/llvm/test/CodeGen/AArch64/inlineasm-ldr-pseudo.ll b/llvm/test/CodeGen/AArch64/inlineasm-ldr-pseudo.ll
index fec68213df596..08a38fa18b737 100644
--- a/llvm/test/CodeGen/AArch64/inlineasm-ldr-pseudo.ll
+++ b/llvm/test/CodeGen/AArch64/inlineasm-ldr-pseudo.ll
@@ -5,16 +5,16 @@
; RUN: llc -mtriple=aarch64 < %s -filetype=obj | llvm-objdump --arch=aarch64 -d - | FileCheck %s
; CHECK-LABEL: <foo>:
-; CHECK: a0 79 95 d2 mov x0, #43981
-; CHECK: c0 03 5f d6 ret
+; CHECK: d29579a0 mov x0, #43981
+; CHECK: d65f03c0 ret
define i32 @foo() nounwind {
entry:
%0 = tail call i32 asm sideeffect "ldr $0,=0xabcd", "=r"() nounwind
ret i32 %0
}
; CHECK-LABEL: <bar>:
-; CHECK: 40 00 00 58 ldr x0, 0x10
-; CHECK: c0 03 5f d6 ret
+; CHECK: 58000040 ldr x0, 0x10
+; CHECK: d65f03c0 ret
; Make sure the constant pool entry comes after the return
; CHECK-LABEL: <$d.1>:
define i32 @bar() nounwind {
diff --git a/llvm/test/CodeGen/AArch64/simple-macho.ll b/llvm/test/CodeGen/AArch64/simple-macho.ll
index e89f529884d13..0d9daae77b4cb 100644
--- a/llvm/test/CodeGen/AArch64/simple-macho.ll
+++ b/llvm/test/CodeGen/AArch64/simple-macho.ll
@@ -6,7 +6,7 @@ define void @foo() {
; CHECK-LABEL: _foo:
; CHECK: ret
-; CHECK-OBJ: 0: c0 03 5f d6 ret
+; CHECK-OBJ: 0: d65f03c0 ret
ret void
}
diff --git a/llvm/test/CodeGen/ARM/inlineasm-ldr-pseudo.ll b/llvm/test/CodeGen/ARM/inlineasm-ldr-pseudo.ll
index da7134530e819..51715c53f3441 100644
--- a/llvm/test/CodeGen/ARM/inlineasm-ldr-pseudo.ll
+++ b/llvm/test/CodeGen/ARM/inlineasm-ldr-pseudo.ll
@@ -3,13 +3,14 @@
; assembly, the current code path will bypass the parser and just write the
; raw text out to the Streamer. We need to actually parse the inlineasm to
; demonstrate the bug. Going the asm->obj route does not show the issue.
-; RUN: llc -mtriple=arm-none-linux < %s -filetype=obj | llvm-objdump -d - | FileCheck %s
-; RUN: llc -mtriple=arm-apple-darwin < %s -filetype=obj | llvm-objdump -d - | FileCheck %s
+; RUN: llc -mtriple=arm-none-linux < %s -filetype=obj | llvm-objdump -d - | FileCheck %s --check-prefixes=CHECK,CHECK-ELF
+; RUN: llc -mtriple=arm-apple-darwin < %s -filetype=obj | llvm-objdump -d - | FileCheck %s --check-prefixes=CHECK,CHECK-MACHO
; CHECK-LABEL: <{{_?}}foo>:
-; CHECK: 0: 00 00 9f e5 ldr r0, [pc]
-; CHECK: 4: 0e f0 a0 e1 mov pc, lr
+; CHECK: 0: e59f0000 ldr r0, [pc]
+; CHECK: 4: e1a0f00e mov pc, lr
; Make sure the constant pool entry comes after the return
-; CHECK: 8: 78 56 34 12
+; CHECK-ELF: 8: 78 56 34 12
+; CHECK-MACHO: 8: 12345678
define i32 @foo() nounwind {
entry:
%0 = tail call i32 asm sideeffect "ldr $0,=0x12345678", "=r"() nounwind
diff --git a/llvm/test/CodeGen/ARM/inlineasm-switch-mode-oneway-from-arm.ll b/llvm/test/CodeGen/ARM/inlineasm-switch-mode-oneway-from-arm.ll
index 414cfb76b391a..92c6e1696b999 100644
--- a/llvm/test/CodeGen/ARM/inlineasm-switch-mode-oneway-from-arm.ll
+++ b/llvm/test/CodeGen/ARM/inlineasm-switch-mode-oneway-from-arm.ll
@@ -10,7 +10,7 @@ define hidden i32 @bah(i8* %start) #0 align 2 {
}
; CHECK: $t
; CHECK: $a
-; CHECK: 01 00 81 e2 add r0, r1, #1
+; CHECK: e2810001 add r0, r1, #1
; .code 32 is implicit
; ASM-LABEL: bah:
diff --git a/llvm/test/CodeGen/ARM/inlineasm-switch-mode-oneway-from-thumb.ll b/llvm/test/CodeGen/ARM/inlineasm-switch-mode-oneway-from-thumb.ll
index db2df7021d00d..e394f8308f3fd 100644
--- a/llvm/test/CodeGen/ARM/inlineasm-switch-mode-oneway-from-thumb.ll
+++ b/llvm/test/CodeGen/ARM/inlineasm-switch-mode-oneway-from-thumb.ll
@@ -10,7 +10,7 @@ define hidden i32 @bah(i8* %start) #0 align 2 {
}
; CHECK: $a
; CHECK: $t
-; CHECK: 48 1c adds r0, r1, #1
+; CHECK: 1c48 adds r0, r1, #1
; ASM: .code 16
; ASM-LABEL: bah:
diff --git a/llvm/test/CodeGen/ARM/inlineasm-switch-mode.ll b/llvm/test/CodeGen/ARM/inlineasm-switch-mode.ll
index c0d6492f10970..5a0017f4ca69c 100644
--- a/llvm/test/CodeGen/ARM/inlineasm-switch-mode.ll
+++ b/llvm/test/CodeGen/ARM/inlineasm-switch-mode.ll
@@ -8,6 +8,6 @@ define hidden i32 @bah(i8* %start) #0 align 2 {
}
; CHECK: $a{{.*}}:
-; CHECK-NEXT: 04 70 2d e5 str r7, [sp, #-4]!
+; CHECK-NEXT: e52d7004 str r7, [sp, #-4]!
; CHECK: $t{{.*}}:
-; CHECK-NEXT: 48 1c adds r0, r1, #1
+; CHECK-NEXT: 1c48 adds r0, r1, #1
diff --git a/llvm/test/CodeGen/ARM/trap.ll b/llvm/test/CodeGen/ARM/trap.ll
index 69a8bb719baa3..fe046e7016655 100644
--- a/llvm/test/CodeGen/ARM/trap.ll
+++ b/llvm/test/CodeGen/ARM/trap.ll
@@ -46,11 +46,11 @@ entry:
; THUMB-LABEL: t:
; THUMB: .inst.n 0xdefe
-; ENCODING-NACL: f0 de fe e7 trap
+; ENCODING-NACL: e7fedef0 trap
-; ENCODING-ARM: fe de ff e7 trap
+; ENCODING-ARM: e7ffdefe trap
-; ENCODING-THUMB: fe de trap
+; ENCODING-THUMB: defe trap
call void @llvm.trap()
unreachable
@@ -73,11 +73,11 @@ entry:
; THUMB-LABEL: t2:
; THUMB: bkpt #0
-; ENCODING-NACL: 70 00 20 e1 bkpt #0
+; ENCODING-NACL: e1200070 bkpt #0
-; ENCODING-ARM: 70 00 20 e1 bkpt #0
+; ENCODING-ARM: e1200070 bkpt #0
-; ENCODING-THUMB: 00 be bkpt #0
+; ENCODING-THUMB: be00 bkpt #0
call void @llvm.debugtrap()
unreachable
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