[llvm] 1bc7b06 - [llvm-objdump, ARM] Make dumpARMELFData line up with instructions.

[Simon Tatham via llvm-commits]

Author: Simon Tatham
Date: 2022-07-26T09:35:31+01:00
New Revision: 1bc7b06ffd9bf54ef6a507d49151f45fd904b8fd

URL: https://github.com/llvm/llvm-project/commit/1bc7b06ffd9bf54ef6a507d49151f45fd904b8fd
DIFF: https://github.com/llvm/llvm-project/commit/1bc7b06ffd9bf54ef6a507d49151f45fd904b8fd.diff

LOG: [llvm-objdump,ARM] Make dumpARMELFData line up with instructions.

The whitespace in output lines containing disassembled instructions
was extremely mismatched against that in `.word` lines produced from
dumping literal pools and other data in Arm ELF files. This patch
adjusts `dumpARMELFData` so that it uses the same alignment system as
in the instruction pretty-printers. Now the two classes of line are
aligned sensibly alongside each other.

Reviewed By: DavidSpickett

Differential Revision: https://reviews.llvm.org/D130359

Added: 
    

Modified: 
    llvm/test/tools/llvm-objdump/ELF/AArch64/disassemble-align.s
    llvm/tools/llvm-objdump/llvm-objdump.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/test/tools/llvm-objdump/ELF/AArch64/disassemble-align.s b/llvm/test/tools/llvm-objdump/ELF/AArch64/disassemble-align.s
index 882f67220542..c29e02a91de8 100644
--- a/llvm/test/tools/llvm-objdump/ELF/AArch64/disassemble-align.s
+++ b/llvm/test/tools/llvm-objdump/ELF/AArch64/disassemble-align.s
@@ -7,7 +7,7 @@
 #  CHECK-NEXT:       4: d503201f     |nop
 # CHECK-EMPTY:
 #  CHECK-NEXT:0000000000000008 <$d.1>:
-#  CHECK-NEXT:       8:|ff ff 00 00|.word|0x0000ffff
+#  CHECK-NEXT:       8: ff ff 00 00  |.word|0x0000ffff
 
   add x2, x3, #4
   nop

diff  --git a/llvm/tools/llvm-objdump/llvm-objdump.cpp b/llvm/tools/llvm-objdump/llvm-objdump.cpp
index cb836459ecad..3a260b0d350f 100644
--- a/llvm/tools/llvm-objdump/llvm-objdump.cpp
+++ b/llvm/tools/llvm-objdump/llvm-objdump.cpp
@@ -994,12 +994,14 @@ static uint64_t dumpARMELFData(uint64_t SectionAddr, uint64_t Index,
                                uint64_t End, const ObjectFile &Obj,
                                ArrayRef<uint8_t> Bytes,
                                ArrayRef<MappingSymbolPair> MappingSymbols,
-                               raw_ostream &OS) {
+                               const MCSubtargetInfo &STI, raw_ostream &OS) {
   support::endianness Endian =
       Obj.isLittleEndian() ? support::little : support::big;
-  OS << format("%8" PRIx64 ":\t", SectionAddr + Index);
+  size_t Start = OS.tell();
+  OS << format("%8" PRIx64 ": ", SectionAddr + Index);
   if (Index + 4 <= End) {
     dumpBytes(Bytes.slice(Index, 4), OS);
+    AlignToInstStartColumn(Start, STI, OS);
     OS << "\t.word\t"
            << format_hex(support::endian::read32(Bytes.data() + Index, Endian),
                          10);
@@ -1007,13 +1009,14 @@ static uint64_t dumpARMELFData(uint64_t SectionAddr, uint64_t Index,
   }
   if (Index + 2 <= End) {
     dumpBytes(Bytes.slice(Index, 2), OS);
-    OS << "\t\t.short\t"
-           << format_hex(support::endian::read16(Bytes.data() + Index, Endian),
-                         6);
+    AlignToInstStartColumn(Start, STI, OS);
+    OS << "\t.short\t"
+       << format_hex(support::endian::read16(Bytes.data() + Index, Endian), 6);
     return 2;
   }
   dumpBytes(Bytes.slice(Index, 1), OS);
-  OS << "\t\t.byte\t" << format_hex(Bytes[Index], 4);
+  AlignToInstStartColumn(Start, STI, OS);
+  OS << "\t.byte\t" << format_hex(Bytes[Index], 4);
   return 1;
 }
 
@@ -1606,7 +1609,7 @@ static void disassembleObject(const Target *TheTarget, ObjectFile &Obj,
 
         if (DumpARMELFData) {
           Size = dumpARMELFData(SectionAddr, Index, End, Obj, Bytes,
-                                MappingSymbols, FOS);
+                                MappingSymbols, *STI, FOS);
         } else {
           // When -z or --disassemble-zeroes are given we always dissasemble
           // them. Otherwise we might want to skip zero bytes we see.