[PATCH] D130536: [ArgPromotion] Transfer metadata nontemporal to promoted loads

Phoebe Wang via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jul 26 01:30:16 PDT 2022


This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG19c5638e4fe2: [ArgPromotion] Transfer metadata nontemporal to promoted loads (authored by pengfei).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D130536/new/

https://reviews.llvm.org/D130536

Files:
  llvm/lib/Transforms/IPO/ArgumentPromotion.cpp
  llvm/test/Transforms/ArgumentPromotion/metadata.ll


Index: llvm/test/Transforms/ArgumentPromotion/metadata.ll
===================================================================
--- llvm/test/Transforms/ArgumentPromotion/metadata.ll
+++ llvm/test/Transforms/ArgumentPromotion/metadata.ll
@@ -4,9 +4,9 @@
 declare void @use.i32(i32)
 declare void @use.p32(i32*)
 
-define internal void @callee(i32* %p1, i32** %p2, i32** %p3, i32** %p4, i32** %p5, i32** %p6) {
+define internal void @callee(i32* %p1, i32** %p2, i32** %p3, i32** %p4, i32** %p5, i32** %p6, i32** %p7) {
 ; CHECK-LABEL: define {{[^@]+}}@callee
-; CHECK-SAME: (i32 [[P1_0_VAL:%.*]], i32* [[P2_0_VAL:%.*]], i32* [[P3_0_VAL:%.*]], i32* [[P4_0_VAL:%.*]], i32* [[P5_0_VAL:%.*]], i32* [[P6_0_VAL:%.*]]) {
+; CHECK-SAME: (i32 [[P1_0_VAL:%.*]], i32* [[P2_0_VAL:%.*]], i32* [[P3_0_VAL:%.*]], i32* [[P4_0_VAL:%.*]], i32* [[P5_0_VAL:%.*]], i32* [[P6_0_VAL:%.*]], i32* [[P7_0_VAL:%.*]]) {
 ; CHECK-NEXT:    [[IS_NOT_NULL:%.*]] = icmp ne i32* [[P2_0_VAL]], null
 ; CHECK-NEXT:    call void @llvm.assume(i1 [[IS_NOT_NULL]])
 ; CHECK-NEXT:    call void @use.i32(i32 [[P1_0_VAL]])
@@ -15,6 +15,7 @@
 ; CHECK-NEXT:    call void @use.p32(i32* [[P4_0_VAL]])
 ; CHECK-NEXT:    call void @use.p32(i32* [[P5_0_VAL]])
 ; CHECK-NEXT:    call void @use.p32(i32* [[P6_0_VAL]])
+; CHECK-NEXT:    call void @use.p32(i32* [[P7_0_VAL]])
 ; CHECK-NEXT:    ret void
 ;
   %v1 = load i32, i32* %p1, !range !0
@@ -23,28 +24,31 @@
   %v4 = load i32*, i32** %p4, !dereferenceable_or_null !2
   %v5 = load i32*, i32** %p5, !align !3
   %v6 = load i32*, i32** %p6, !noundef !1
+  %v7 = load i32*, i32** %p7, !nontemporal !4
   call void @use.i32(i32 %v1)
   call void @use.p32(i32* %v2)
   call void @use.p32(i32* %v3)
   call void @use.p32(i32* %v4)
   call void @use.p32(i32* %v5)
   call void @use.p32(i32* %v6)
+  call void @use.p32(i32* %v7)
   ret void
 }
 
-define void @caller(i32* %p1, i32** %p2, i32** %p3, i32** %p4, i32** %p5, i32** %p6) {
+define void @caller(i32* %p1, i32** %p2, i32** %p3, i32** %p4, i32** %p5, i32** %p6, i32** %p7) {
 ; CHECK-LABEL: define {{[^@]+}}@caller
-; CHECK-SAME: (i32* [[P1:%.*]], i32** [[P2:%.*]], i32** [[P3:%.*]], i32** [[P4:%.*]], i32** [[P5:%.*]], i32** [[P6:%.*]]) {
+; CHECK-SAME: (i32* [[P1:%.*]], i32** [[P2:%.*]], i32** [[P3:%.*]], i32** [[P4:%.*]], i32** [[P5:%.*]], i32** [[P6:%.*]], i32** [[P7:%.*]]) {
 ; CHECK-NEXT:    [[P1_VAL:%.*]] = load i32, i32* [[P1]], align 4, !range [[RNG0:![0-9]+]]
 ; CHECK-NEXT:    [[P2_VAL:%.*]] = load i32*, i32** [[P2]], align 8, !nonnull !1
 ; CHECK-NEXT:    [[P3_VAL:%.*]] = load i32*, i32** [[P3]], align 8, !dereferenceable !2
 ; CHECK-NEXT:    [[P4_VAL:%.*]] = load i32*, i32** [[P4]], align 8, !dereferenceable_or_null !2
 ; CHECK-NEXT:    [[P5_VAL:%.*]] = load i32*, i32** [[P5]], align 8, !align !3
 ; CHECK-NEXT:    [[P6_VAL:%.*]] = load i32*, i32** [[P6]], align 8, !noundef !1
-; CHECK-NEXT:    call void @callee(i32 [[P1_VAL]], i32* [[P2_VAL]], i32* [[P3_VAL]], i32* [[P4_VAL]], i32* [[P5_VAL]], i32* [[P6_VAL]])
+; CHECK-NEXT:    [[P7_VAL:%.*]] = load i32*, i32** [[P7]], align 8, !nontemporal !4
+; CHECK-NEXT:    call void @callee(i32 [[P1_VAL]], i32* [[P2_VAL]], i32* [[P3_VAL]], i32* [[P4_VAL]], i32* [[P5_VAL]], i32* [[P6_VAL]], i32* [[P7_VAL]])
 ; CHECK-NEXT:    ret void
 ;
-  call void @callee(i32* %p1, i32** %p2, i32** %p3, i32** %p4, i32** %p5, i32** %p6)
+  call void @callee(i32* %p1, i32** %p2, i32** %p3, i32** %p4, i32** %p5, i32** %p6, i32** %p7)
   ret void
 }
 
@@ -84,3 +88,4 @@
 !1 = !{}
 !2 = !{i64 8}
 !3 = !{i64 4}
+!4 = !{i32 1}
Index: llvm/lib/Transforms/IPO/ArgumentPromotion.cpp
===================================================================
--- llvm/lib/Transforms/IPO/ArgumentPromotion.cpp
+++ llvm/lib/Transforms/IPO/ArgumentPromotion.cpp
@@ -249,7 +249,8 @@
                              {LLVMContext::MD_range, LLVMContext::MD_nonnull,
                               LLVMContext::MD_dereferenceable,
                               LLVMContext::MD_dereferenceable_or_null,
-                              LLVMContext::MD_align, LLVMContext::MD_noundef});
+                              LLVMContext::MD_align, LLVMContext::MD_noundef,
+                              LLVMContext::MD_nontemporal});
           }
           Args.push_back(LI);
           ArgAttrVec.push_back(AttributeSet());


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