[llvm] 5ae0472 - [GlobalISel] Fix miscompile of G_UREM + G_UDIV due to not checking for equality
Amara Emerson via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 25 16:03:11 PDT 2022
Author: Amara Emerson
Date: 2022-07-25T16:03:05-07:00
New Revision: 5ae0472694f5d53c0b889a48dc042961291d2341
URL: https://github.com/llvm/llvm-project/commit/5ae0472694f5d53c0b889a48dc042961291d2341
DIFF: https://github.com/llvm/llvm-project/commit/5ae0472694f5d53c0b889a48dc042961291d2341.diff
LOG: [GlobalISel] Fix miscompile of G_UREM + G_UDIV due to not checking for equality
of the first operands of each.
Fixes issue #55287
Differential Revision: https://reviews.llvm.org/D130525
Added:
llvm/test/CodeGen/AArch64/GlobalISel/combine-udivrem-use-bug.mir
Modified:
llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
Removed:
################################################################################
diff --git a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
index da054b9c14fbd..05a25bc3078eb 100644
--- a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
@@ -1142,7 +1142,8 @@ bool CombinerHelper::matchCombineDivRem(MachineInstr &MI,
if (MI.getParent() == UseMI.getParent() &&
((IsDiv && UseMI.getOpcode() == RemOpcode) ||
(!IsDiv && UseMI.getOpcode() == DivOpcode)) &&
- matchEqualDefs(MI.getOperand(2), UseMI.getOperand(2))) {
+ matchEqualDefs(MI.getOperand(2), UseMI.getOperand(2)) &&
+ matchEqualDefs(MI.getOperand(1), UseMI.getOperand(1))) {
OtherMI = &UseMI;
return true;
}
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/combine-udivrem-use-bug.mir b/llvm/test/CodeGen/AArch64/GlobalISel/combine-udivrem-use-bug.mir
new file mode 100644
index 0000000000000..656900de5a30e
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/combine-udivrem-use-bug.mir
@@ -0,0 +1,25 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -o - -mtriple=aarch64-unknown-unknown -run-pass=aarch64-prelegalizer-combiner -verify-machineinstrs %s | FileCheck %s
+# Check that we don't miscompile this into G_UDIVREM because of the
diff erent
+# first operands.
+---
+name: no_combine_divrem_
diff erent_src1
+body: |
+ bb.1:
+ liveins: $w0
+
+ ; CHECK-LABEL: name: no_combine_divrem_
diff erent_src1
+ ; CHECK: liveins: $w0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
+ ; CHECK-NEXT: [[UREM:%[0-9]+]]:_(s32) = G_UREM [[COPY]], [[COPY]]
+ ; CHECK-NEXT: [[UDIV:%[0-9]+]]:_(s32) = G_UDIV [[UREM]], [[COPY]]
+ ; CHECK-NEXT: $w0 = COPY [[UDIV]](s32)
+ ; CHECK-NEXT: RET_ReallyLR implicit $w0
+ %0:_(s32) = COPY $w0
+ %1:_(s32) = G_UREM %0, %0
+ %2:_(s32) = G_UDIV %1, %0
+ $w0 = COPY %2(s32)
+ RET_ReallyLR implicit $w0
+
+...
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