[PATCH] D130482: [LAA] Avoid non-determinism due to blocks order. PR56672

[Florian Hahn via Phabricator via llvm-commits]

fhahn requested changes to this revision.
fhahn added a comment.
This revision now requires changes to proceed.

It would be good to clean up the test first.



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Comment at: llvm/test/Transforms/LoopVectorize/X86/pr56672.ll:2
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -passes='loop(loop-rotate),loop-vectorize' -S -mcpu=skylake-avx512 -S %s | FileCheck %s
+; RUN: opt -passes='loop(loop-rotate),invalidate<loops>,loop-vectorize' -S -mcpu=skylake-avx512 -S %s | FileCheck %s
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As this test a LAA issue, could you just use `print<loop-accesses>` instead?


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Comment at: llvm/test/Transforms/LoopVectorize/X86/pr56672.ll:46
+bb2:                                              ; preds = %bb1
+  store i32 1, i32 addrspace(1)* %tmp7, align 4
+  %tmp = add nuw i64 %tmp5, 1
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adressspace not needed.


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Comment at: llvm/test/Transforms/LoopVectorize/X86/pr56672.ll:48
+  %tmp = add nuw i64 %tmp5, 1
+  %tmp3 = icmp ult i64 %tmp, undef
+  br i1 %tmp3, label %bb4, label %bb11
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please replace the `undef` to avoid the test having UB


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Comment at: llvm/test/Transforms/LoopVectorize/X86/pr56672.ll:54
+  %tmp6 = phi i64 [ %tmp5, %bb2 ], [ 15, %bb ]
+  %tmp7 = getelementptr inbounds i32, i32 addrspace(1)* null, i64 %tmp5
+  %tmp8 = load i32, i32 addrspace(1)* %tmp7, align 4
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Please avoid loads from `null`, as this is UB.


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  https://reviews.llvm.org/D130482/new/

https://reviews.llvm.org/D130482