[PATCH] D129537: [X86][DAGISel] Don't widen shuffle element with AVX512

LuoYuanke via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Jul 25 07:09:50 PDT 2022


LuoYuanke added inline comments.


================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:19326
+    case ISD::AND:
+    case ISD::XOR:
+      break;
----------------
RKSimon wrote:
> RKSimon wrote:
> > This list is going to get longer, and we're likely to miss patterns that only fold to target nodes later on - I'm wondering whether we could consider accepting any TLI.isBinOp() case here?
> Please can you add a TODO about maybe converting this to TLI.isBinOp()?
Thank Simon for the suggestion. It seems there is regression on some cases, I'll take a look at the regression.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D129537/new/

https://reviews.llvm.org/D129537



More information about the llvm-commits mailing list