[llvm] 13853cf - [PhaseOrdering] add explanatory comment for test; NFC

Sanjay Patel via llvm-commits llvm-commits at lists.llvm.org
Sun Jul 24 14:47:43 PDT 2022


Author: Sanjay Patel
Date: 2022-07-24T17:07:17-04:00
New Revision: 13853cf73035757fa36a410227de9c39c0e9eb26

URL: https://github.com/llvm/llvm-project/commit/13853cf73035757fa36a410227de9c39c0e9eb26
DIFF: https://github.com/llvm/llvm-project/commit/13853cf73035757fa36a410227de9c39c0e9eb26.diff

LOG: [PhaseOrdering] add explanatory comment for test; NFC

This note was going to be added in D129650, but we
solved the problem by reverting another patch, and
I missed transferring the comment.

Added: 
    

Modified: 
    llvm/test/Transforms/PhaseOrdering/SystemZ/sub-xor.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/PhaseOrdering/SystemZ/sub-xor.ll b/llvm/test/Transforms/PhaseOrdering/SystemZ/sub-xor.ll
index 66870d1308e82..23e45bc5946f8 100644
--- a/llvm/test/Transforms/PhaseOrdering/SystemZ/sub-xor.ll
+++ b/llvm/test/Transforms/PhaseOrdering/SystemZ/sub-xor.ll
@@ -6,6 +6,11 @@ target triple = "systemz"
 
 @ARR = internal global [100 x i32] zeroinitializer, align 4
 
+; This test uses 'sub' instructions for gep offsets to allow
+; codegen (LSR) to create optimal asm. If 'sub' is canonicalized
+; to 'xor', then the backend needs to be able to see through
+; that transform to produce optimal asm.
+
 define dso_local zeroext i32 @foo(ptr noundef %a) #0 {
 ; CHECK-LABEL: @foo(
 ; CHECK-NEXT:  entry:


        


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