[llvm] 7bfa06f - [CodeGen] Use range-based for loops (NFC)
Kazu Hirata via llvm-commits
llvm-commits at lists.llvm.org
Sat Jul 23 16:10:53 PDT 2022
Author: Kazu Hirata
Date: 2022-07-23T16:10:46-07:00
New Revision: 7bfa06f6c0905aa2fb30f12784e942625696d440
URL: https://github.com/llvm/llvm-project/commit/7bfa06f6c0905aa2fb30f12784e942625696d440
DIFF: https://github.com/llvm/llvm-project/commit/7bfa06f6c0905aa2fb30f12784e942625696d440.diff
LOG: [CodeGen] Use range-based for loops (NFC)
Added:
Modified:
llvm/include/llvm/CodeGen/CallingConvLower.h
llvm/include/llvm/CodeGen/LiveVariables.h
llvm/include/llvm/CodeGen/MachineInstr.h
llvm/include/llvm/CodeGen/MachinePipeliner.h
llvm/include/llvm/CodeGen/RegisterScavenging.h
llvm/include/llvm/CodeGen/ScheduleDAG.h
llvm/lib/CodeGen/LiveVariables.cpp
Removed:
################################################################################
diff --git a/llvm/include/llvm/CodeGen/CallingConvLower.h b/llvm/include/llvm/CodeGen/CallingConvLower.h
index 90afbfc32a4e3..5c3776e972c04 100644
--- a/llvm/include/llvm/CodeGen/CallingConvLower.h
+++ b/llvm/include/llvm/CodeGen/CallingConvLower.h
@@ -435,8 +435,8 @@ class CCState {
/// Note that, unlike AllocateReg, this shadows ALL of the shadow registers.
unsigned AllocateStack(unsigned Size, Align Alignment,
ArrayRef<MCPhysReg> ShadowRegs) {
- for (unsigned i = 0; i < ShadowRegs.size(); ++i)
- MarkAllocated(ShadowRegs[i]);
+ for (MCPhysReg Reg : ShadowRegs)
+ MarkAllocated(Reg);
return AllocateStack(Size, Alignment);
}
diff --git a/llvm/include/llvm/CodeGen/LiveVariables.h b/llvm/include/llvm/CodeGen/LiveVariables.h
index aa198527415dd..03a0517d2642d 100644
--- a/llvm/include/llvm/CodeGen/LiveVariables.h
+++ b/llvm/include/llvm/CodeGen/LiveVariables.h
@@ -219,8 +219,7 @@ class LiveVariables : public MachineFunctionPass {
return false;
bool Removed = false;
- for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
- MachineOperand &MO = MI.getOperand(i);
+ for (MachineOperand &MO : MI.operands()) {
if (MO.isReg() && MO.isKill() && MO.getReg() == Reg) {
MO.setIsKill(false);
Removed = true;
@@ -255,8 +254,7 @@ class LiveVariables : public MachineFunctionPass {
return false;
bool Removed = false;
- for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
- MachineOperand &MO = MI.getOperand(i);
+ for (MachineOperand &MO : MI.operands()) {
if (MO.isReg() && MO.isDef() && MO.getReg() == Reg) {
MO.setIsDead(false);
Removed = true;
diff --git a/llvm/include/llvm/CodeGen/MachineInstr.h b/llvm/include/llvm/CodeGen/MachineInstr.h
index 9d36164674c2b..5f483a8d0312c 100644
--- a/llvm/include/llvm/CodeGen/MachineInstr.h
+++ b/llvm/include/llvm/CodeGen/MachineInstr.h
@@ -572,12 +572,9 @@ class MachineInstr
/// Returns true if the instruction has implicit definition.
bool hasImplicitDef() const {
- for (unsigned I = getNumExplicitOperands(), E = getNumOperands();
- I != E; ++I) {
- const MachineOperand &MO = getOperand(I);
+ for (const MachineOperand &MO : implicit_operands())
if (MO.isDef() && MO.isImplicit())
return true;
- }
return false;
}
diff --git a/llvm/include/llvm/CodeGen/MachinePipeliner.h b/llvm/include/llvm/CodeGen/MachinePipeliner.h
index 4559f7a9bde78..fc1cc0a879caa 100644
--- a/llvm/include/llvm/CodeGen/MachinePipeliner.h
+++ b/llvm/include/llvm/CodeGen/MachinePipeliner.h
@@ -333,9 +333,9 @@ class NodeSet {
NodeSet() = default;
NodeSet(iterator S, iterator E) : Nodes(S, E), HasRecurrence(true) {
Latency = 0;
- for (unsigned i = 0, e = Nodes.size(); i < e; ++i) {
+ for (const SUnit *Node : Nodes) {
DenseMap<SUnit *, unsigned> SuccSUnitLatency;
- for (const SDep &Succ : Nodes[i]->Succs) {
+ for (const SDep &Succ : Node->Succs) {
auto SuccSUnit = Succ.getSUnit();
if (!Nodes.count(SuccSUnit))
continue;
diff --git a/llvm/include/llvm/CodeGen/RegisterScavenging.h b/llvm/include/llvm/CodeGen/RegisterScavenging.h
index 1f0cd273bf618..52797afbd8486 100644
--- a/llvm/include/llvm/CodeGen/RegisterScavenging.h
+++ b/llvm/include/llvm/CodeGen/RegisterScavenging.h
@@ -146,9 +146,8 @@ class RegScavenger {
/// Query whether a frame index is a scavenging frame index.
bool isScavengingFrameIndex(int FI) const {
- for (SmallVectorImpl<ScavengedInfo>::const_iterator I = Scavenged.begin(),
- IE = Scavenged.end(); I != IE; ++I)
- if (I->FrameIndex == FI)
+ for (const ScavengedInfo &SI : Scavenged)
+ if (SI.FrameIndex == FI)
return true;
return false;
@@ -156,10 +155,9 @@ class RegScavenger {
/// Get an array of scavenging frame indices.
void getScavengingFrameIndices(SmallVectorImpl<int> &A) const {
- for (SmallVectorImpl<ScavengedInfo>::const_iterator I = Scavenged.begin(),
- IE = Scavenged.end(); I != IE; ++I)
- if (I->FrameIndex >= 0)
- A.push_back(I->FrameIndex);
+ for (const ScavengedInfo &I : Scavenged)
+ if (I.FrameIndex >= 0)
+ A.push_back(I.FrameIndex);
}
/// Make a register of the specific register class
diff --git a/llvm/include/llvm/CodeGen/ScheduleDAG.h b/llvm/include/llvm/CodeGen/ScheduleDAG.h
index f1c377f76d02b..2fe2aabe833e7 100644
--- a/llvm/include/llvm/CodeGen/ScheduleDAG.h
+++ b/llvm/include/llvm/CodeGen/ScheduleDAG.h
@@ -525,9 +525,8 @@ class TargetRegisterInfo;
virtual void push(SUnit *U) = 0;
void push_all(const std::vector<SUnit *> &Nodes) {
- for (std::vector<SUnit *>::const_iterator I = Nodes.begin(),
- E = Nodes.end(); I != E; ++I)
- push(*I);
+ for (SUnit *SU : Nodes)
+ push(SU);
}
virtual SUnit *pop() = 0;
diff --git a/llvm/lib/CodeGen/LiveVariables.cpp b/llvm/lib/CodeGen/LiveVariables.cpp
index 94bdfab5e5e0a..40250171fe1e1 100644
--- a/llvm/lib/CodeGen/LiveVariables.cpp
+++ b/llvm/lib/CodeGen/LiveVariables.cpp
@@ -758,8 +758,7 @@ void LiveVariables::replaceKillInstruction(Register Reg, MachineInstr &OldMI,
/// removeVirtualRegistersKilled - Remove all killed info for the specified
/// instruction.
void LiveVariables::removeVirtualRegistersKilled(MachineInstr &MI) {
- for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
- MachineOperand &MO = MI.getOperand(i);
+ for (MachineOperand &MO : MI.operands()) {
if (MO.isReg() && MO.isKill()) {
MO.setIsKill(false);
Register Reg = MO.getReg();
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