[PATCH] D130339: [CodeGen] Generate efficient assembly for freeze(poison) version of `mm*_cast*` intel intrinsics

[Juneyoung Lee via Phabricator via llvm-commits]

aqjune added inline comments.


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Comment at: llvm/lib/Target/X86/X86InstrVecCompiler.td:76
+                                  (iPTR 0))),
+            (VT (INSERT_SUBREG (IMPLICIT_DEF), subRC:$src, subIdx))>;
 }
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I found that using `insert_subvector (freeze undef)` instead of `insert_subvector (freeze (VT undef))` causes this rule to be silently ignored during instruction selection.
What would the possible reasons be? I tried to figure it out, but couldn't.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D130339/new/

https://reviews.llvm.org/D130339