[PATCH] D129690: [LLVM][AMDGPU] Specialize 32-bit atomic fadd instruction for generic address space
Stanislav Mekhanoshin via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 21 12:01:51 PDT 2022
rampitec added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/SIISelLowering.cpp:12734
if (Ty->isFloatTy() && AS == AMDGPUAS::FLAT_ADDRESS)
- return AtomicExpansionKind::CmpXChg;
+ return AtomicExpansionKind::Expand;
----------------
rampitec wrote:
> If this atomic falls into system scope it has to be expanded into CAS. This code breaks the logic.
> The check below was done after the AS check to perform a fast check first since the outcome is the same anyway. This is not true anymore.
Thanks, I believe it is correct now for the CAS vs expand logic ans system scope.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D129690/new/
https://reviews.llvm.org/D129690
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