[PATCH] D130151: [X86][FP16] Do not split FP64->FP16 to FP64->FP32->FP16

[LuoYuanke via Phabricator via llvm-commits]

LuoYuanke added inline comments.


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Comment at: llvm/test/CodeGen/X86/half-constrained.ll:208
+; X32-F16C-NEXT:    vmovq %xmm0, (%esp)
+; X32-F16C-NEXT:    calll ___truncdfhf2
+; X32-F16C-NEXT:    vpextrw $0, %xmm0, _a
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Just be curious. Why there are 4 underscore? Is it the right function name?


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Comment at: llvm/test/CodeGen/X86/vector-half-conversions.ll:727
 ; AVX2-NEXT:    vcvtpd2ps %ymm0, %xmm0
 ; AVX2-NEXT:    vcvtps2ph $0, %xmm0, %xmm0
 ; AVX2-NEXT:    vmovlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
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It seems transform from double to float and then float to half. The same for AVX1.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D130151/new/

https://reviews.llvm.org/D130151