[PATCH] D130164: [LV] Support predicated div/rem operations via safe-divisor select idiom

[Philip Reames via Phabricator via llvm-commits]

reames added a comment.

In D130164#3666301 <https://reviews.llvm.org/D130164#3666301>, @efriedma wrote:

> On targets with a vector "div" instruction, the instruction never actually traps or otherwise misbehaves; the only reason we have an issue here is that the IR "sdiv" is defined to be instant UB.  Maybe we could consider introducing a new IR operation to model this?  Maybe it doesn't really matter, though; division is expensive enough that the cost of an extra "select" is probably insignificant.

I think we run the very real danger of letting perfection be the enemy of the good here.  Once we can vectorize this at all, we can come back and explore better lowerings.


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https://reviews.llvm.org/D130164