[llvm] 19d4f5e - [test] Add missing REQUIRES: arm-registered-target

[Arthur Eubanks via llvm-commits]

Author: Arthur Eubanks
Date: 2022-07-20T10:59:07-07:00
New Revision: 19d4f5e6495ce7e03b803235b648b915d5745314

URL: https://github.com/llvm/llvm-project/commit/19d4f5e6495ce7e03b803235b648b915d5745314
DIFF: https://github.com/llvm/llvm-project/commit/19d4f5e6495ce7e03b803235b648b915d5745314.diff

LOG: [test] Add missing REQUIRES: arm-registered-target

Added: 
    

Modified: 
    llvm/test/Transforms/CodeGenPrepare/dead-allocation.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/CodeGenPrepare/dead-allocation.ll b/llvm/test/Transforms/CodeGenPrepare/dead-allocation.ll
index 65d775f4a5ccf..637040a0d56d2 100644
--- a/llvm/test/Transforms/CodeGenPrepare/dead-allocation.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/dead-allocation.ll
@@ -1,5 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; Eliminate the dead allocation instruction
+; REQUIRES: arm-registered-target
 ; RUN: opt -codegenprepare < %s -S | FileCheck %s
 
 target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"