[PATCH] D130013: [AArch64][SVE] Add DAG-Combine to push bitcasts from floating point loads after DUPLANE128

[Paul Walker via Phabricator via llvm-commits]

paulwalker-arm accepted this revision.
paulwalker-arm added inline comments.
This revision is now accepted and ready to land.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:19226
+  EVT NewSubvecVT =
+      getPackedSVEVectorVT(Subvec.getValueType().getVectorElementType());
+
----------------
SubvecVT? Which might have the side effect of fitting on the same line.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D130013/new/

https://reviews.llvm.org/D130013