[PATCH] D129989: [AArch64] Add f16 fpimm patterns

[Rosie Sumpter via Phabricator via llvm-commits]

RosieSumpter added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:1129
   if (Subtarget->hasSVE()) {
+    setOperationAction(ISD::ConstantFP, MVT::f16, Legal);
+
----------------
dmgreen wrote:
> I think if this is added we need to add extra lowering for FP16 constants of any kind, and it probably shouldn't be guarded by hasSVE but done in general.
> 
> Any i16 constant can be materialized with a single mov, so the worst case is that plus a gpr->fpr, which is likely better than the load we currently produce.
> https://godbolt.org/z/r59arn5bq
Hi Dave, thanks for having a look. I've had a go at doing this - let me know if it looks alright. 


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D129989/new/

https://reviews.llvm.org/D129989