[llvm] 6fb27bc - [SystemZ][z/OS] Introduce CCAssignToRegAndStack to calling convention
Yusra Syeda via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 19 10:57:57 PDT 2022
Author: Yusra Syeda
Date: 2022-07-19T13:55:25-04:00
New Revision: 6fb27bc2e3eac45d597bfc9285e5e1cb8ca16a60
URL: https://github.com/llvm/llvm-project/commit/6fb27bc2e3eac45d597bfc9285e5e1cb8ca16a60
DIFF: https://github.com/llvm/llvm-project/commit/6fb27bc2e3eac45d597bfc9285e5e1cb8ca16a60.diff
LOG: [SystemZ][z/OS] Introduce CCAssignToRegAndStack to calling convention
Differential Revision: https://reviews.llvm.org/D127328
Added:
Modified:
llvm/docs/WritingAnLLVMBackend.rst
llvm/include/llvm/Target/TargetCallingConv.td
llvm/lib/Target/SystemZ/SystemZCallingConv.cpp
llvm/lib/Target/SystemZ/SystemZCallingConv.h
llvm/lib/Target/SystemZ/SystemZCallingConv.td
llvm/utils/TableGen/CallingConvEmitter.cpp
Removed:
################################################################################
diff --git a/llvm/docs/WritingAnLLVMBackend.rst b/llvm/docs/WritingAnLLVMBackend.rst
index fbf16cb576755..a6124bc9bcb7b 100644
--- a/llvm/docs/WritingAnLLVMBackend.rst
+++ b/llvm/docs/WritingAnLLVMBackend.rst
@@ -1562,6 +1562,18 @@ use, then ``RetCC_X86_32_SSE`` is invoked.
CCDelegateTo<RetCC_X86_32_C>
]>;
+``CCAssignToRegAndStack`` is the same as ``CCAssignToReg``, but also allocates
+a stack slot, when some register is used. Basically, it works like:
+``CCIf<CCAssignToReg<regList>, CCAssignToStack<size, align>>``.
+
+.. code-block:: text
+
+ class CCAssignToRegAndStack<list<Register> regList, int size, int align>
+ : CCAssignToReg<regList> {
+ int Size = size;
+ int Align = align;
+ }
+
Other calling convention interfaces include:
* ``CCIf <predicate, action>`` --- If the predicate matches, apply the action.
diff --git a/llvm/include/llvm/Target/TargetCallingConv.td b/llvm/include/llvm/Target/TargetCallingConv.td
index a719581e0ac3c..18b7ff4aec95f 100644
--- a/llvm/include/llvm/Target/TargetCallingConv.td
+++ b/llvm/include/llvm/Target/TargetCallingConv.td
@@ -141,6 +141,15 @@ class CCAssignToStackWithShadow<int size,
list<Register> ShadowRegList = shadowList;
}
+/// CCAssignToRegAndStack - Same as CCAssignToReg, but also allocates a stack
+/// slot, when some register is used. Basically, it works like:
+/// CCIf<CCAssignToReg<regList>, CCAssignToStack<size, align>>.
+class CCAssignToRegAndStack<list<Register> regList, int size, int align>
+ : CCAssignToReg<regList> {
+ int Size = size;
+ int Align = align;
+}
+
/// CCPassByVal - This action always matches: it assigns the value to a stack
/// slot to implement ByVal aggregate parameter passing. Size and alignment
/// specify the minimum size and alignment for the stack slot.
diff --git a/llvm/lib/Target/SystemZ/SystemZCallingConv.cpp b/llvm/lib/Target/SystemZ/SystemZCallingConv.cpp
index 9c73757d7f5cf..86eb8365d527f 100644
--- a/llvm/lib/Target/SystemZ/SystemZCallingConv.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZCallingConv.cpp
@@ -28,7 +28,3 @@ const MCPhysReg SystemZ::XPLINK64ArgGPRs[SystemZ::XPLINK64NumArgGPRs] = {
const MCPhysReg SystemZ::XPLINK64ArgFPRs[SystemZ::XPLINK64NumArgFPRs] = {
SystemZ::F0D, SystemZ::F2D, SystemZ::F4D, SystemZ::F6D
};
-
-const MCPhysReg SystemZ::XPLINK64ArgVRs[SystemZ::XPLINK64NumArgVRs] = {
- SystemZ::V24, SystemZ::V25, SystemZ::V26, SystemZ::V27,
- SystemZ::V28, SystemZ::V29, SystemZ::V30, SystemZ::V31};
diff --git a/llvm/lib/Target/SystemZ/SystemZCallingConv.h b/llvm/lib/Target/SystemZ/SystemZCallingConv.h
index f82c61c0f344e..387411942abaf 100644
--- a/llvm/lib/Target/SystemZ/SystemZCallingConv.h
+++ b/llvm/lib/Target/SystemZ/SystemZCallingConv.h
@@ -27,9 +27,6 @@ namespace SystemZ {
const unsigned XPLINK64NumArgFPRs = 4;
extern const MCPhysReg XPLINK64ArgFPRs[XPLINK64NumArgFPRs];
-
- const unsigned XPLINK64NumArgVRs = 8;
- extern const MCPhysReg XPLINK64ArgVRs[XPLINK64NumArgVRs];
} // end namespace SystemZ
class SystemZCCState : public CCState {
@@ -205,41 +202,6 @@ inline bool CC_XPLINK64_Allocate128BitVararg(unsigned &ValNo, MVT &ValVT,
return false;
}
-inline bool CC_XPLINK64_Shadow_Stack(unsigned &ValNo, MVT &ValVT, MVT &LocVT,
- CCValAssign::LocInfo &LocInfo,
- ISD::ArgFlagsTy &ArgFlags,
- CCState &State) {
- ArrayRef<MCPhysReg> RegList;
-
- switch (LocVT.SimpleTy) {
- case MVT::i64:
- RegList = SystemZ::XPLINK64ArgGPRs;
- break;
- case MVT::v16i8:
- case MVT::v8i16:
- case MVT::v4i32:
- case MVT::v2i64:
- case MVT::v4f32:
- case MVT::v2f64:
- RegList = SystemZ::XPLINK64ArgVRs;
- break;
- case MVT::f32:
- case MVT::f64:
- case MVT::f128:
- RegList = SystemZ::XPLINK64ArgFPRs;
- break;
- default:
- return false;
- }
-
- unsigned UnallocatedRegisterIndex = State.getFirstUnallocated(RegList);
- // Every time we can allocate a register, allocate on the stack.
- if (UnallocatedRegisterIndex < RegList.size())
- State.AllocateStack(LocVT.getSizeInBits() / 8, Align(8));
-
- return false;
-}
-
inline bool RetCC_SystemZ_Error(unsigned &, MVT &, MVT &,
CCValAssign::LocInfo &, ISD::ArgFlagsTy &,
CCState &) {
diff --git a/llvm/lib/Target/SystemZ/SystemZCallingConv.td b/llvm/lib/Target/SystemZ/SystemZCallingConv.td
index e7613bb5c0f21..29b4a26736b25 100644
--- a/llvm/lib/Target/SystemZ/SystemZCallingConv.td
+++ b/llvm/lib/Target/SystemZ/SystemZCallingConv.td
@@ -247,34 +247,29 @@ def CC_SystemZ_XPLINK64 : CallingConv<[
// The first 3 integer arguments are passed in registers R1D-R3D.
// The rest will be passed in the user area. The address offset of the user
// area can be found in register R4D.
- CCIfType<[i64], CCCustom<"CC_XPLINK64_Shadow_Stack">>,
- CCIfType<[i64], CCAssignToReg<[R1D, R2D, R3D]>>,
+ CCIfType<[i64], CCAssignToRegAndStack<[R1D, R2D, R3D], 8, 8>>,
- // The first 8 named vector arguments are passed in V24-V31. Sub-128 vectors
+ // The first 8 named vector arguments are passed in V24-V31. Sub-128 vectors
// are passed in the same way, but they're widened to one of these types
// during type legalization.
CCIfSubtarget<"hasVector()",
CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
- CCIfFixed<CCCustom<"CC_XPLINK64_Shadow_Reg">>>>,
- CCIfSubtarget<"hasVector()",
- CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
- CCIfFixed<CCCustom<"CC_XPLINK64_Shadow_Stack">>>>,
+ CCIfFixed<CCCustom<"CC_XPLINK64_Shadow_Reg">>>>,
CCIfSubtarget<"hasVector()",
CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
- CCIfFixed<CCAssignToReg<[V24, V25, V26, V27,
- V28, V29, V30, V31]>>>>,
+ CCIfFixed<CCAssignToRegAndStack<[V24, V25, V26, V27,
+ V28, V29, V30, V31], 16, 8>>>>,
- // The first 4 named float and double arguments are passed in registers FPR0-FPR6.
- // The rest will be passed in the user area.
+ // The first 4 named float and double arguments are passed in registers
+ // FPR0-FPR6. The rest will be passed in the user area.
CCIfType<[f32, f64], CCIfFixed<CCCustom<"CC_XPLINK64_Shadow_Reg">>>,
- CCIfType<[f32, f64], CCIfFixed<CCCustom<"CC_XPLINK64_Shadow_Stack">>>,
- CCIfType<[f32], CCIfFixed<CCAssignToReg<[F0S, F2S, F4S, F6S]>>>,
- CCIfType<[f64], CCIfFixed<CCAssignToReg<[F0D, F2D, F4D, F6D]>>>,
+ CCIfType<[f32], CCIfFixed<CCAssignToRegAndStack<[F0S, F2S, F4S, F6S], 4, 8>>>,
+ CCIfType<[f64], CCIfFixed<CCAssignToRegAndStack<[F0D, F2D, F4D, F6D], 8, 8>>>,
+
// The first 2 long double arguments are passed in register FPR0/FPR2
// and FPR4/FPR6. The rest will be passed in the user area.
CCIfType<[f128], CCIfFixed<CCCustom<"CC_XPLINK64_Shadow_Reg">>>,
- CCIfType<[f128], CCIfFixed<CCCustom<"CC_XPLINK64_Shadow_Stack">>>,
- CCIfType<[f128], CCIfFixed<CCAssignToReg<[F0Q, F4Q]>>>,
+ CCIfType<[f128], CCIfFixed<CCAssignToRegAndStack<[F0Q, F4Q], 16, 8>>>,
// Other arguments are passed in 8-byte-aligned 8-byte stack slots.
CCIfType<[i32, i64, f32, f64], CCAssignToStack<8, 8>>,
diff --git a/llvm/utils/TableGen/CallingConvEmitter.cpp b/llvm/utils/TableGen/CallingConvEmitter.cpp
index 8f080cd250abc..e8ec90e9c0780 100644
--- a/llvm/utils/TableGen/CallingConvEmitter.cpp
+++ b/llvm/utils/TableGen/CallingConvEmitter.cpp
@@ -149,7 +149,8 @@ void CallingConvEmitter::EmitAction(Record *Action,
<< "(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))\n"
<< IndentStr << " return false;\n";
DelegateToMap[CurrentAction].insert(CC->getName().str());
- } else if (Action->isSubClassOf("CCAssignToReg")) {
+ } else if (Action->isSubClassOf("CCAssignToReg") ||
+ Action->isSubClassOf("CCAssignToRegAndStack")) {
ListInit *RegList = Action->getValueAsListInit("RegList");
if (RegList->size() == 1) {
std::string Name = getQualifiedName(RegList->getElementAsRecord(0));
@@ -178,6 +179,28 @@ void CallingConvEmitter::EmitAction(Record *Action,
}
O << IndentStr << " State.addLoc(CCValAssign::getReg(ValNo, ValVT, "
<< "Reg, LocVT, LocInfo));\n";
+ if (Action->isSubClassOf("CCAssignToRegAndStack")) {
+ int Size = Action->getValueAsInt("Size");
+ int Align = Action->getValueAsInt("Align");
+ O << IndentStr << " (void)State.AllocateStack(";
+ if (Size)
+ O << Size << ", ";
+ else
+ O << "\n"
+ << IndentStr
+ << " State.getMachineFunction().getDataLayout()."
+ "getTypeAllocSize(EVT(LocVT).getTypeForEVT(State.getContext())),"
+ " ";
+ if (Align)
+ O << "Align(" << Align << ")";
+ else
+ O << "\n"
+ << IndentStr
+ << " State.getMachineFunction().getDataLayout()."
+ "getABITypeAlign(EVT(LocVT).getTypeForEVT(State.getContext()"
+ "))";
+ O << ");\n";
+ }
O << IndentStr << " return false;\n";
O << IndentStr << "}\n";
} else if (Action->isSubClassOf("CCAssignToRegWithShadow")) {
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