[PATCH] D130076: [llvm/CodeGen] Enable the ExpandLargeDivRem pass for X86, Arm and AArch64

[Matthias Gehre via Phabricator via llvm-commits]

mgehre-amd created this revision.
mgehre-amd added a reviewer: arsenm.
Herald added subscribers: jsji, hiraditya, kristof.beyls.
Herald added a project: All.
mgehre-amd requested review of this revision.
Herald added a subscriber: wdng.
Herald added a project: LLVM.

This adds the ExpandLargeDivRem to the default pass pipeline.
The limit at which it expands div/rem instructions is configured
via a new TargetTransformInfo hook (default: no expansion)
X86, Arm and AArch64 backends implement this hook to expand div/rem
instructions with more than 128 bits.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D130076

Files:
  llvm/include/llvm/Analysis/TargetTransformInfo.h
  llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
  llvm/lib/Analysis/TargetTransformInfo.cpp
  llvm/lib/CodeGen/ExpandLargeDivRem.cpp
  llvm/lib/CodeGen/TargetPassConfig.cpp
  llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
  llvm/lib/Target/ARM/ARMTargetTransformInfo.h
  llvm/lib/Target/X86/X86TargetTransformInfo.cpp
  llvm/lib/Target/X86/X86TargetTransformInfo.h
  llvm/test/CodeGen/AArch64/O0-pipeline.ll
  llvm/test/CodeGen/AArch64/O3-pipeline.ll
  llvm/test/CodeGen/AArch64/udivmodei5.ll
  llvm/test/CodeGen/ARM/O3-pipeline.ll
  llvm/test/CodeGen/ARM/udivmodei5.ll
  llvm/test/CodeGen/X86/O0-pipeline.ll
  llvm/test/CodeGen/X86/opt-pipeline.ll
  llvm/test/CodeGen/X86/udivmodei5.ll