[PATCH] D129161: [MachinePipeliner] Consider only direct path successors when calculating circuit latency
Sergei Barannikov via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 18 23:45:09 PDT 2022
barannikov88 added a comment.
By the way, there are other issues with the current implementation. From the top of my head:
- getDistance does not look through PHIs, hence the value returned never exceeds 1. This may needlessly increase node functions (ASAP, ALAP etc.).
- canReserveResources and reserveResources do not align in the way they work with ProcResourceCount. This may cause a compiler crash.
- Calculation of latency between two instructions connected through a PHI does not involve scheduling info; the computed latency is always one or zero (don't remember which one exactly).
- Finally, the schedule the pipeliner carefully crafted is destroyed by the subsequent MI scheduler, which makes it less useful for VLIW in-order targets.
There is a room for improvement, but thanks-to-out-of-order-execution few people care.
A workaround for your issue is simple - you just don't call calculateRecMII and estimate MII yourself. You may as well force it to 1 and it will be safe because MII is just a hint for the scheduler. This will affect compilation time, of course.
Excuse my English
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https://reviews.llvm.org/D129161/new/
https://reviews.llvm.org/D129161
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