[PATCH] D129757: [RISCV] Optimize SELECT_CC when the true value of select is Constant
Liao Chunyu via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 18 18:56:13 PDT 2022
liaolucy updated this revision to Diff 445672.
liaolucy added a comment.
1. Address @frasercrmck's comments
2. Address @asb's comments. Fix negative optimization of 20100416-1.c from the GCC torture suite. No optimization is required when TrueV and FalseV are both constants.
selectcc-to-shiftand.ll has an example already covering this type.
define i32 @pos_sel_constants(i32 signext %a) {
; CHECK-LABEL: pos_sel_constants:
; CHECK: # %bb.0:
; CHECK-NEXT: mv a1, a0
; CHECK-NEXT: li a0, 5
; CHECK-NEXT: bgez a1, .LBB4_2
; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: li a0, 0
; CHECK-NEXT: .LBB4_2:
; CHECK-NEXT: ret
%tmp.1 = icmp sgt i32 %a, -1
%retval = select i1 %tmp.1, i32 5, i32 0
ret i32 %retval
}
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D129757/new/
https://reviews.llvm.org/D129757
Files:
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/test/CodeGen/RISCV/double-convert-strict.ll
llvm/test/CodeGen/RISCV/double-convert.ll
llvm/test/CodeGen/RISCV/float-convert-strict.ll
llvm/test/CodeGen/RISCV/float-convert.ll
llvm/test/CodeGen/RISCV/fpclamptosat.ll
llvm/test/CodeGen/RISCV/fpclamptosat_vec.ll
llvm/test/CodeGen/RISCV/half-convert-strict.ll
llvm/test/CodeGen/RISCV/half-convert.ll
llvm/test/CodeGen/RISCV/rv32zbb-zbp-zbkb.ll
llvm/test/CodeGen/RISCV/rv32zbs.ll
llvm/test/CodeGen/RISCV/rv64zbb.ll
llvm/test/CodeGen/RISCV/uadd_sat.ll
llvm/test/CodeGen/RISCV/uadd_sat_plus.ll
llvm/test/CodeGen/RISCV/usub_sat.ll
llvm/test/CodeGen/RISCV/usub_sat_plus.ll
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