[llvm] bddf207 - [AArch64][NFC] Set true for default of subfeature is more readable

[via llvm-commits]

Author: zhongyunde
Date: 2022-07-19T09:00:00+08:00
New Revision: bddf20735ee420ebe44bc4658dc8efef46827472

URL: https://github.com/llvm/llvm-project/commit/bddf20735ee420ebe44bc4658dc8efef46827472
DIFF: https://github.com/llvm/llvm-project/commit/bddf20735ee420ebe44bc4658dc8efef46827472.diff

LOG: [AArch64][NFC] Set true for default of subfeature is more readable

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D129960

Added: 
    

Modified: 
    llvm/lib/Target/AArch64/AArch64.td
    llvm/lib/Target/AArch64/AArch64MachineScheduler.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AArch64/AArch64.td b/llvm/lib/Target/AArch64/AArch64.td
index b332e9dcb1760..8fb5d49e2121f 100644
--- a/llvm/lib/Target/AArch64/AArch64.td
+++ b/llvm/lib/Target/AArch64/AArch64.td
@@ -216,7 +216,7 @@ def FeatureSlowPaired128 : SubtargetFeature<"slow-paired-128",
     "IsPaired128Slow", "true", "Paired 128 bit loads and stores are slow">;
 
 def FeatureAscendStoreAddress : SubtargetFeature<"ascend-store-address",
-    "IsStoreAddressAscend", "false",
+    "IsStoreAddressAscend", "true",
     "Schedule vector stores by ascending address">;
 
 def FeatureSlowSTRQro : SubtargetFeature<"slow-strqro-store", "IsSTRQroSlow",

diff  --git a/llvm/lib/Target/AArch64/AArch64MachineScheduler.cpp b/llvm/lib/Target/AArch64/AArch64MachineScheduler.cpp
index 6c8845ee85986..79866c9b0a053 100644
--- a/llvm/lib/Target/AArch64/AArch64MachineScheduler.cpp
+++ b/llvm/lib/Target/AArch64/AArch64MachineScheduler.cpp
@@ -22,8 +22,8 @@ static bool needReorderStoreMI(const MachineInstr *MI) {
     return false;
   case AArch64::STURQi:
   case AArch64::STRQui:
-    if (MI->getMF()->getSubtarget<AArch64Subtarget>().isStoreAddressAscend())
-       return false;
+    if (!MI->getMF()->getSubtarget<AArch64Subtarget>().isStoreAddressAscend())
+      return false;
     LLVM_FALLTHROUGH;
   case AArch64::STPQi:
     return AArch64InstrInfo::getLdStOffsetOp(*MI).isImm();