[PATCH] D130047: [RISCV] Disable constant hoisting for multiply by negated power of 2.

[Craig Topper via Phabricator via llvm-commits]

craig.topper created this revision.
craig.topper added reviewers: reames, asb, luismarques.
Herald added subscribers: sunshaoce, VincentWu, luke957, StephenFan, vkmr, frasercrmck, evandro, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, zzheng, jrtc27, shiva0217, kito-cheng, niosHD, sabuasal, simoncook, johnrusso, rbar, hiraditya, arichardson.
Herald added a reviewer: ributzka.
Herald added a project: All.
craig.topper requested review of this revision.
Herald added subscribers: pcwang-thead, eopXD, MaskRay.
Herald added a project: LLVM.

A mul by a negated power of 2 is a slli followed by neg. This doesn't
require any constant materialization and may be lower latency than mul.
The neg may also be foldable into other arithmetic.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D130047

Files:
  llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
  llvm/test/Transforms/ConstantHoisting/RISCV/immediates.ll


Index: llvm/test/Transforms/ConstantHoisting/RISCV/immediates.ll
===================================================================
--- llvm/test/Transforms/ConstantHoisting/RISCV/immediates.ll
+++ llvm/test/Transforms/ConstantHoisting/RISCV/immediates.ll
@@ -72,3 +72,12 @@
   %2 = and i64 %1, 4294967295
   ret i64 %2
 }
+
+; Check that we don't hoist mul with negated power of 2.
+define i64 @test9(i64 %a) nounwind {
+; CHECK-LABEL: test9
+; CHECK: mul i64 %a, -4294967296
+  %1 = mul i64 %a, -4294967296
+  %2 = mul i64 %1, -4294967296
+  ret i64 %2
+}
Index: llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
===================================================================
--- llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
+++ llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
@@ -71,7 +71,13 @@
   case Instruction::Add:
   case Instruction::Or:
   case Instruction::Xor:
+    Takes12BitImm = true;
+    break;
   case Instruction::Mul:
+    // Negated power of 2 is a shift and a negate.
+    if (Imm.isNegatedPowerOf2())
+      return TTI::TCC_Free;
+    // FIXME: There is no MULI instruction.
     Takes12BitImm = true;
     break;
   case Instruction::Sub:


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D130047.445642.patch
Type: text/x-patch
Size: 1181 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20220718/83c68287/attachment.bin>