[PATCH] D130013: [AArch64][SVE] Add DAG-Combine to push bitcasts from floating point loads after DUPLANE128

[Matt Devereau via Phabricator via llvm-commits]

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Pushing the bitcasts from floating point loads to after DUPLANE128 allows dupqlane(insert(undef, bitcast(load(2 x float)), 0), 0) to use the same ISel Pattern from https://reviews.llvm.org/D130010 as their integer counter parts.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D130013

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/test/CodeGen/AArch64/sve-ld1r.ll

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