[PATCH] D129933: [DAG] SimplifyDemandedBits - relax "xor (X >> ShiftC), XorC --> (not X) >> ShiftC" to match only demanded bits

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.


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Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:13633
+        return MaskIdx == ShiftAmt && MaskLen == (BitWidth - ShiftAmt);
+      return MaskIdx == 0 && MaskLen == (BitWidth - ShiftAmt);
+    }
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I'm not totally happy that we have all this (duplicated) logic in the arm/aarch64 overrides - an alternative would be to add a 'bool IsPartialMatch' argument?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D129933/new/

https://reviews.llvm.org/D129933