[PATCH] D130001: [AMDGPU][NFC] Validate G_MERGE_VALUES as we match zero-extended 32-bit scalars.

[Ivan Kosarev via Phabricator via llvm-commits]

kosarev created this revision.
kosarev added reviewers: foad, arsenm, rampitec.
Herald added subscribers: jsilvanus, kerbowa, hiraditya, t-tye, tpr, dstuttard, yaxunl, nhaehnle, jvesely, kzhuravl.
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kosarev requested review of this revision.
Herald added subscribers: llvm-commits, wdng.
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Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D130001

Files:
  llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp


Index: llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+++ llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
@@ -3237,6 +3237,8 @@
   if (Def->getOpcode() != AMDGPU::G_MERGE_VALUES)
     return Register();
 
+  assert(Def->getNumOperands() == 3 &&
+         MRI.getType(Def->getOperand(0).getReg()) == LLT::scalar(64));
   if (mi_match(Def->getOperand(2).getReg(), MRI, m_ZeroInt())) {
     return Def->getOperand(1).getReg();
   }


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