[PATCH] D129995: [AArch64] isDesirableToCommuteWithShift - fix UBFX masked shift comment. NFC.

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon created this revision.
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Something that was confusing me while investigating the regressions in D129933 <https://reviews.llvm.org/D129933> - the comment looks to be the wrong way around as isDesirableToCommuteWithShift is called with a shift op.

IIRC this is the pattern that isSeveralBitsExtractOpFromShr then uses.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D129995

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp


Index: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
===================================================================
--- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -13595,7 +13595,7 @@
                                                      CombineLevel Level) const {
   N = N->getOperand(0).getNode();
   EVT VT = N->getValueType(0);
-    // If N is unsigned bit extraction: ((x >> C) & mask), then do not combine
+    // If N is unsigned bit extraction: ((x & mask) >> C), then do not combine
     // it with shift to let it be lowered to UBFX.
   if (N->getOpcode() == ISD::AND && (VT == MVT::i32 || VT == MVT::i64) &&
       isa<ConstantSDNode>(N->getOperand(1))) {


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