[PATCH] D129933: [DAG] SimplifyDemandedBits - relax "xor (X >> ShiftC), XorC --> (not X) >> ShiftC" to match only demanded bits

[Dave Green via Phabricator via llvm-commits]

dmgreen added a comment.

> We might be able to adjust visitShiftByConstant + isDesirableToCommuteWithShift to handle this - I'll take a look.

That might be best - this does seem to come up in practice. For example:

  define i32 @test(i32 %conv73, i32 %i63.0) {
    %and74 = shl i32 %i63.0, 2
    %sub75 = and i32 %and74, 4
    %shl76 = xor i32 %sub75, 4
    ret i32 %shl76
  }

  movs    r0, #4               |   42         mvns    r0, r1            
  bic.w   r0, r0, r1, lsl #2   |   43         movs    r1, #4            
  -----------------------------|   44         and.w   r0, r1, r0, lsl #2


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  https://reviews.llvm.org/D129933/new/

https://reviews.llvm.org/D129933