[PATCH] D128073: [SROA] Try harder to find a vector promotion viable type when rewriting

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: llvm/lib/Transforms/Scalar/SROA.cpp:1854
+/// all slices of the alloca for the given VectorType.
+static bool CheckVectorTypeForPromotion(Partition &P, VectorType *VTy,
+                                        const DataLayout &DL) {
----------------
Lowercase Check


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Comment at: llvm/test/Transforms/SROA/sroa-common-type-fail-promotion.ll:24
+  store <8 x half> zeroinitializer, ptr %1, align 16
+  %data = call <4 x float> @llvm.amdgcn.raw.buffer.load.v4f32(<4 x i32> %0, i32 0, i32 0, i32 0)
+  store <4 x float> %data, ptr %b_blockwise_copy, align 16
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If you're dropping the target and address spaces, should also replace the amdgcn intrinsics with something else (maybe just regular loads should suffice)


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D128073/new/

https://reviews.llvm.org/D128073