[PATCH] D129927: [MachineScheduler] Try to issue the load instruction preferentially

[Allen zhong via Phabricator via llvm-commits]

Allen created this revision.
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Based on the discussion, it is preferable to hoist the loads as much as possible after register allocation.
https://discourse.llvm.org/t/insn-schedule-is-it-reasonable-to-issue-the-load-instruction-preferentially/63674


https://reviews.llvm.org/D129927

Files:
  llvm/lib/Target/AArch64/AArch64.td
  llvm/lib/Target/AArch64/AArch64MachineScheduler.cpp
  llvm/test/CodeGen/AArch64/aarch64-sched-load.ll

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