[PATCH] D129890: [SDAG] reduce cast ops around sign_extend_inreg
Sanjay Patel via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 15 11:56:27 PDT 2022
spatel created this revision.
spatel added reviewers: RKSimon, craig.topper, deadalnix.
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There are a pair of large regressions in D127115 <https://reviews.llvm.org/D127115> for Thumb2 caused by not folding this pattern:
trunc (sign_ext_inreg (anyext iN X), iM) to iN --> sign_ext_inreg X to iM
This fold should be enough to resolve those test diffs.
Unfortunately, I haven't found a way to expose this pattern with current SDAG, so there are no tests included. Suggestions welcome if anyone has ideas.
https://reviews.llvm.org/D129890
Files:
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
===================================================================
--- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -13133,6 +13133,16 @@
return N0.getOperand(0);
}
+ // trunc (sign_ext_inreg (anyext iN X), iM) to iN --> sign_ext_inreg X to iM
+ if (N0.getOpcode() == ISD::SIGN_EXTEND_INREG) {
+ SDValue N00 = N0.getOperand(0);
+ SDValue N01 = N0.getOperand(1);
+ if (N00.getOpcode() == ISD::ANY_EXTEND &&
+ N00.getOperand(0).getValueType() == VT)
+ return DAG.getNode(ISD::SIGN_EXTEND_INREG, SDLoc(N), VT,
+ N00.getOperand(0), N01);
+ }
+
// If this is anyext(trunc), don't fold it, allow ourselves to be folded.
if (N->hasOneUse() && (N->use_begin()->getOpcode() == ISD::ANY_EXTEND))
return SDValue();
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