[llvm] 165eaf1 - [X86] test-vs-bittest.ll - add test coverage for (and (srl (not x), c), 1) patterns

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2022-07-15T17:45:42+01:00
New Revision: 165eaf18db7b9a40119428623c5afdf958d93d81

URL: https://github.com/llvm/llvm-project/commit/165eaf18db7b9a40119428623c5afdf958d93d81
DIFF: https://github.com/llvm/llvm-project/commit/165eaf18db7b9a40119428623c5afdf958d93d81.diff

LOG: [X86] test-vs-bittest.ll - add test coverage for (and (srl (not x), c), 1) patterns

These can appear as well as the more common (and (not (srl x, c)), 1) patterns

Added: 
    

Modified: 
    llvm/test/CodeGen/X86/test-vs-bittest.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/X86/test-vs-bittest.ll b/llvm/test/CodeGen/X86/test-vs-bittest.ll
index a37febbfbdbb..76cf265db8f1 100644
--- a/llvm/test/CodeGen/X86/test-vs-bittest.ll
+++ b/llvm/test/CodeGen/X86/test-vs-bittest.ll
@@ -571,6 +571,20 @@ define i64 @is_upper_bit_clear_i64(i64 %x) {
   ret i64 %r
 }
 
+define i64 @is_upper_bit_clear_i64_not(i64 %x) {
+; CHECK-LABEL: is_upper_bit_clear_i64_not:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movq %rdi, %rax
+; CHECK-NEXT:    notq %rax
+; CHECK-NEXT:    shrq $39, %rax
+; CHECK-NEXT:    andl $1, %eax
+; CHECK-NEXT:    retq
+  %n = xor i64 %x, -1
+  %sh = lshr i64 %n, 39
+  %r = and i64 %sh, 1
+  ret i64 %r
+}
+
 define i64 @is_lower_bit_clear_i64(i64 %x) {
 ; CHECK-LABEL: is_lower_bit_clear_i64:
 ; CHECK:       # %bb.0:
@@ -584,6 +598,20 @@ define i64 @is_lower_bit_clear_i64(i64 %x) {
   ret i64 %r
 }
 
+define i64 @is_lower_bit_clear_i64_not(i64 %x) {
+; CHECK-LABEL: is_lower_bit_clear_i64_not:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movq %rdi, %rax
+; CHECK-NEXT:    notl %eax
+; CHECK-NEXT:    shrl $16, %eax
+; CHECK-NEXT:    andl $1, %eax
+; CHECK-NEXT:    retq
+  %n = xor i64 %x, -1
+  %sh = lshr i64 %n, 16
+  %r = and i64 %sh, 1
+  ret i64 %r
+}
+
 define i32 @is_bit_clear_i32(i32 %x) {
 ; CHECK-LABEL: is_bit_clear_i32:
 ; CHECK:       # %bb.0:
@@ -597,6 +625,20 @@ define i32 @is_bit_clear_i32(i32 %x) {
   ret i32 %r
 }
 
+define i32 @is_bit_clear_i32_not(i32 %x) {
+; CHECK-LABEL: is_bit_clear_i32_not:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movl %edi, %eax
+; CHECK-NEXT:    notl %eax
+; CHECK-NEXT:    shrl $27, %eax
+; CHECK-NEXT:    andl $1, %eax
+; CHECK-NEXT:    retq
+  %n = xor i32 %x, -1
+  %sh = lshr i32 %n, 27
+  %r = and i32 %sh, 1
+  ret i32 %r
+}
+
 define i16 @is_bit_clear_i16(i16 %x) {
 ; CHECK-LABEL: is_bit_clear_i16:
 ; CHECK:       # %bb.0:
@@ -611,6 +653,21 @@ define i16 @is_bit_clear_i16(i16 %x) {
   ret i16 %r
 }
 
+define i16 @is_bit_clear_i16_not(i16 %x) {
+; CHECK-LABEL: is_bit_clear_i16_not:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movl %edi, %eax
+; CHECK-NEXT:    notl %eax
+; CHECK-NEXT:    shrl $2, %eax
+; CHECK-NEXT:    andl $1, %eax
+; CHECK-NEXT:    # kill: def $ax killed $ax killed $eax
+; CHECK-NEXT:    retq
+  %n = xor i16 %x, -1
+  %sh = lshr i16 %n, 2
+  %r = and i16 %sh, 1
+  ret i16 %r
+}
+
 define i8 @is_bit_clear_i8(i8 %x) {
 ; CHECK-LABEL: is_bit_clear_i8:
 ; CHECK:       # %bb.0:
@@ -623,6 +680,21 @@ define i8 @is_bit_clear_i8(i8 %x) {
   ret i8 %r
 }
 
+define i8 @is_bit_clear_i8_not(i8 %x) {
+; CHECK-LABEL: is_bit_clear_i8_not:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movl %edi, %eax
+; CHECK-NEXT:    notb %al
+; CHECK-NEXT:    shrb $2, %al
+; CHECK-NEXT:    andb $1, %al
+; CHECK-NEXT:    # kill: def $al killed $al killed $eax
+; CHECK-NEXT:    retq
+  %n = xor i8 %x, -1
+  %sh = lshr i8 %n, 2
+  %r = and i8 %sh, 1
+  ret i8 %r
+}
+
 ; TODO: We could use bt/test on the 64-bit value.
 
 define i8 @overshift(i64 %x) {