[PATCH] D129415: [VE] Support load/store/spill of vector mask registers

Erich Focht via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Jul 15 02:15:34 PDT 2022


efocht requested changes to this revision.
efocht added a comment.
This revision now requires changes to proceed.

Just a tiny typo. Otherwise looks good.



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Comment at: llvm/lib/Target/VE/VEInstrVec.td:8
+// These pseudo instructions are used for only spill/restore since
+// InlineSpiller asusmes storeRegToStackSlot/loadRegFromStackSlot
+// functions emit only single instruction.  Those functions emit a
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tiny typo: "asusmes" -> "assumes"


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D129415/new/

https://reviews.llvm.org/D129415



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