[PATCH] D129757: [RISCV] Optimize SELECT_CC when condition is eq and the true value of select is zero
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 14 18:20:45 PDT 2022
craig.topper added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:3894
SDValue TargetCC = DAG.getCondCode(CCVal);
+ if (isa<ConstantSDNode>(TrueV) && CCVal == ISD::SETEQ) {
+ auto *ConstNode = cast<ConstantSDNode>(TrueV);
----------------
This transform is equally valid to turn SETNE into SETEQ right?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D129757/new/
https://reviews.llvm.org/D129757
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