[PATCH] D129637: [AMDGPU][MC][GFX11] Correct disassembly of *_e64_dpp opcodes which support op_sel

[Dmitry Preobrazhensky via Phabricator via llvm-commits]

dp updated this revision to Diff 444598.
dp added a comment.

Updated stale comments; added a comment describing how VOP3/VOP3P operand values are used in disassembler.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D129637/new/

https://reviews.llvm.org/D129637

Files:
  llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
  llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
  llvm/lib/Target/AMDGPU/SIInstrFormats.td
  llvm/lib/Target/AMDGPU/VOPInstructions.td
  llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16.txt
  llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8.txt

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