[llvm] cef349a - [GlobalISel] Re-generate some checks.

[Amara Emerson via llvm-commits]

Author: Amara Emerson
Date: 2022-07-14T00:57:53-07:00
New Revision: cef349a3c8b873f3a3f7a5f8ff33a63a1092d63f

URL: https://github.com/llvm/llvm-project/commit/cef349a3c8b873f3a3f7a5f8ff33a63a1092d63f
DIFF: https://github.com/llvm/llvm-project/commit/cef349a3c8b873f3a3f7a5f8ff33a63a1092d63f.diff

LOG: [GlobalISel] Re-generate some checks.

Added: 
    

Modified: 
    llvm/test/CodeGen/AArch64/GlobalISel/legalize-constant.mir
    llvm/test/CodeGen/AArch64/GlobalISel/legalize-fp16-fconstant.mir

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-constant.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-constant.mir
index 79543882f8221..07eec1101e0a3 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-constant.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-constant.mir
@@ -42,7 +42,9 @@ body: |
   bb.0:
     liveins: $x0
     ; CHECK-LABEL: name: test_fconstant
-    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 1.000000e+00
+    ; CHECK: liveins: $x0
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 1.000000e+00
     ; CHECK-NEXT: $w0 = COPY [[C]](s32)
     ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_FCONSTANT double 2.000000e+00
     ; CHECK-NEXT: $x0 = COPY [[C1]](s64)
@@ -66,7 +68,9 @@ body: |
   bb.0:
     liveins: $x0
     ; CHECK-LABEL: name: s792
-    ; CHECK: %trunc:_(s32) = G_CONSTANT i32 0
+    ; CHECK: liveins: $x0
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: %trunc:_(s32) = G_CONSTANT i32 0
     ; CHECK-NEXT: $w0 = COPY %trunc(s32)
     ; CHECK-NEXT: RET_ReallyLR implicit $w0
     %cst:_(s792) = G_CONSTANT i792 0
@@ -81,7 +85,9 @@ body: |
   bb.0:
     liveins: $x0
     ; CHECK-LABEL: name: s318
-    ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1234
+    ; CHECK: liveins: $x0
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1234
     ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
     ; CHECK-NEXT: %ptr:_(p0) = COPY $x0
     ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
@@ -117,7 +123,9 @@ body: |
   bb.0:
     liveins: $x0
     ; CHECK-LABEL: name: s158
-    ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1234
+    ; CHECK: liveins: $x0
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1234
     ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
     ; CHECK-NEXT: %ptr:_(p0) = COPY $x0
     ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
@@ -149,7 +157,9 @@ body: |
     liveins: $x0
 
     ; CHECK-LABEL: name: s142
-    ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1234
+    ; CHECK: liveins: $x0
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1234
     ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
     ; CHECK-NEXT: %ptr:_(p0) = COPY $x0
     ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1

diff  --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-fp16-fconstant.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-fp16-fconstant.mir
index 685035a9ead90..4d4a3693fe316 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-fp16-fconstant.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-fp16-fconstant.mir
@@ -9,13 +9,13 @@ body: |
   bb.0:
     ; NO-FP16-LABEL: name: fp16
     ; NO-FP16: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 0.000000e+00
-    ; NO-FP16: %cst:_(s16) = G_FPTRUNC [[C]](s32)
-    ; NO-FP16: $h0 = COPY %cst(s16)
-    ; NO-FP16: RET_ReallyLR implicit $h0
+    ; NO-FP16-NEXT: %cst:_(s16) = G_FPTRUNC [[C]](s32)
+    ; NO-FP16-NEXT: $h0 = COPY %cst(s16)
+    ; NO-FP16-NEXT: RET_ReallyLR implicit $h0
     ; FP16-LABEL: name: fp16
     ; FP16: %cst:_(s16) = G_FCONSTANT half 0xH0000
-    ; FP16: $h0 = COPY %cst(s16)
-    ; FP16: RET_ReallyLR implicit $h0
+    ; FP16-NEXT: $h0 = COPY %cst(s16)
+    ; FP16-NEXT: RET_ReallyLR implicit $h0
     %cst:_(s16) = G_FCONSTANT half 0.0
     $h0 = COPY %cst
     RET_ReallyLR implicit $h0