[PATCH] D129690: [LLVM][AMDGPU] Specialize 32-bit atomic fadd instruction for generic address space

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: llvm/test/CodeGen/AMDGPU/atomicrmw-expand.ll:4-8
+ ; CHECK: global_atomic_add_f32
+ ; CHECK: flat_load_dword
+ ; CHECK: v_add_f32_e32
+ ; CHECK: flat_store_dword
+ ; CHECK: ds_add_f32
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arsenm wrote:
> tianshilei1992 wrote:
> > arsenm wrote:
> > > This doesn't demonstrate any of the looping structure
> > There is no loop.
> I mean branching
Plus the global case does still require the cmpxchg loop in some cases. e.g. everything in shouldExpandAtomicRMWInIR still applies for the atomics you are emitting


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  https://reviews.llvm.org/D129690/new/

https://reviews.llvm.org/D129690