[PATCH] D129690: [LLVM][AMDGPU] Specialize 32-bit atomic fadd instruction for generic address space

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: llvm/lib/Target/AMDGPU/SIISelLowering.cpp:13026-13028
+  Value *LoadedShared = Builder.CreateIntrinsic(
+      Intrinsic::amdgcn_ds_fadd, {ValTy}, {Cast, Val, ZeroI32, ZeroI32, ZeroI1},
+      nullptr, "loaded.shared");
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You shouldn't need to use the intrinsic. You can use the atomicrmw with the new address space and rely on the existing handling


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Comment at: llvm/lib/Target/AMDGPU/SIISelLowering.cpp:13047-13048
+      PointerType::getWithSamePointeeType(PtrTy, AMDGPUAS::GLOBAL_ADDRESS));
+  Value *LoadedGlobal = Builder.CreateIntrinsic(
+      Intrinsic::amdgcn_global_atomic_fadd, {ValTy, Cast1->getType(), ValTy},
+      {Cast1, Val}, nullptr, "loaded.global");
----------------
Same here, could just emit the atomicrmw with addrspace(1)


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D129690/new/

https://reviews.llvm.org/D129690