[PATCH] D129609: [RISCV] Exploit fact that vscale is always power of two to replace urem sequence

Philip Reames via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jul 13 10:55:32 PDT 2022


This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGdde2a7fb6da4: [RISCV] Exploit fact that vscale is always power of two to replace urem sequence (authored by reames).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D129609/new/

https://reviews.llvm.org/D129609

Files:
  llvm/include/llvm/CodeGen/TargetLowering.h
  llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVISelLowering.h
  llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll
  llvm/test/CodeGen/RISCV/rvv/vscale-power-of-two.ll

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