[PATCH] D128252: [AMDGPU] VGPR to SGPR copies lowering

Wed Jul 13 08:31:49 PDT 2022

alex-t added a comment.

In D128252#3644778 <https://reviews.llvm.org/D128252#3644778>, @foad wrote:

>> [AMDGPU] VGPR to SGPR copies lowering

> In future I would like VGPR-to-SGPR copies to be legal, and always implemented as a readfirstlane, so that this whole pass could be truly optional and we could skip it at -O0.

They are already legal. As soon as I integrate part2 that takes care of the REG_SEQUENCE and PHIs we can lower all to v_readfirstlane_b32 at -O0.
Now we cannot because the REG_SEQUENCE and PHIs having VGPR input are converted to VALU unconditionally and we are going to have bugs similar to that just fixed in VK-CTS.

Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D128252/new/

https://reviews.llvm.org/D128252